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added preliminary and FPFA untested(!) support for nexys4 DDR board

Browse Source 
- rtl/bplib/nexys4d: added board support
- rtl/sys_gen
  - tst_rlink/nexys4d: rlink tester design
  - tst_serloop/nexys4d: serial port tester design
  - tst_snhumanio/nexys4d: human IO tester design
  - w11a/nexys4d_bram: w11 design using BRAM only
This commit is contained in:
Walter F.J. Mueller
2017-01-04 22:12:29 +01:00
parent b2e7c1cdbb
commit 0e96fa106b
66 changed files with 3670 additions and 5 deletions
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2
tools/dox/w11_cpp.Doxyfile
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@@ -5,7 +5,7 @@
#---------------------------------------------------------------------------
DOXYFILE_ENCODING = UTF-8
PROJECT_NAME = "w11 - cpp"
PROJECT_NUMBER = 0.74
PROJECT_NUMBER = 0.741
PROJECT_BRIEF = "Backend server for Rlink and w11"
PROJECT_LOGO =
OUTPUT_DIRECTORY = $(RETRODOXY)/w11/cpp

2
tools/dox/w11_tcl.Doxyfile
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@@ -5,7 +5,7 @@
#---------------------------------------------------------------------------
DOXYFILE_ENCODING = UTF-8
PROJECT_NAME = "w11 - tcl"
PROJECT_NUMBER = 0.74
PROJECT_NUMBER = 0.741
PROJECT_BRIEF = "Backend server for Rlink and w11"
PROJECT_LOGO =
OUTPUT_DIRECTORY = $(RETRODOXY)/w11/tcl

4
tools/dox/w11_vhd_all.Doxyfile
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@@ -5,7 +5,7 @@
#---------------------------------------------------------------------------
DOXYFILE_ENCODING = UTF-8
PROJECT_NAME = "w11 - vhd"
PROJECT_NUMBER = 0.74
PROJECT_NUMBER = 0.741
PROJECT_BRIEF = "W11 CPU core and support modules"
PROJECT_LOGO =
OUTPUT_DIRECTORY = $(RETRODOXY)/w11/vhd
@@ -108,6 +108,8 @@ EXCLUDE_SYMLINKS = NO
EXCLUDE_PATTERNS = */*_ssim.vhd \
*/*_fsim.vhd \
*/*_tsim.vhd \
*/*_osim.vhd \
*/*_rsim.vhd \
*/.svn* \
*/tests/*
EXCLUDE_SYMBOLS =