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docu and comment updates [skip ci]
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## Known differences between SimH, 11/70, and w11a
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### SimH: No unconditional instruction fetch after stack error abort
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The 11/70 suppresses the recognition of _break requests_ at the end of
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a vector flow of a stack error abort. The processor manual states
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> 6.2.2.3 Timing of Stack Error Aborts
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> BRQ STROBE is thus inhibited, not only during ZAP.00, but also during
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> SVC.90, thus guaranteeing the execution of the first instruction of the
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> error subroutine before any other error can be processed.
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The rationale behind was apparently to ensure that the handler, which
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is called with `SP=0` pointing to an emergency stack, can set up a new
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stack before any other condition interferes.
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SimH does not implement this behavior, nor does w11.
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Beyond that, it would be very difficult to verify this extreme corner case.
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