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add MIG support for Arty S7

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wfjm
2019-02-02 09:36:23 +01:00
parent bb8669630b
commit 3cb0bc6924
16 changed files with 920 additions and 9 deletions
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doc/CHANGELOG.md
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@@ -24,6 +24,7 @@ The full set of tests is only run for tagged releases.
- add support for DDR memory via Vivado MIG cores for
- Digilent Arty
- Digilent Nexys4 DDR
- Digilent Arty S7
- add a low level MIG interface test design
### New features