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ssr->mmr rename: the final cleanup

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wfjm
2022-08-18 09:06:43 +02:00
parent f77e2bef31
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9 changed files with 178 additions and 143 deletions
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doc/CHANGELOG.md
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@@ -34,7 +34,8 @@ The full set of tests is only run for tagged releases.
- Doxygen support now for V1.9.4; remove discontinued Tcl support
- build flow Vivado 2022.1 ready; handle synth 8-3331 -> 8-7129 transition
- remove Atlys support (only test designs, a w11 design was never done)
- cleanup SimH setup files (*.scmd), use autoconfig, set disk types
- cleanup SimH setup files (\*.scmd), use autoconfig, set disk types
- cleanup code base, use page,mmr\*,pdr,par instead of segment,ssr\*,sdr,sar
### New features
- new verification codes
- tools/tcode: fast cpu verification codes
@@ -42,7 +43,7 @@ The full set of tests is only run for tagged releases.
### Changes
- tools changes
- ci.yml: define TBW_GHDL_OPTS and suppress IEEE package warnings at t=0ms
- **/tbrun.yml: since nexys4 not longer available switch to nexys4d
- \*\*/tbrun.yml: since nexys4 not longer available switch to nexys4d
- tools/bin
- asm-11:
- limited macro support (.macro,.endm)
@@ -54,8 +55,8 @@ The full set of tests is only run for tagged releases.
- tmuconv: add DEUNA defs; add -t_vf -t_all; fis mnemos; add headers
- tools/tcl
- w11/tcodes.tcl: driver for tcode execution
- tools/oskit/*
- *.scmd: set RL/RP disk types
- tools/oskit/\*
- \*.scmd: set RL/RP disk types
- rsx11mp-30_rp_boot.scmd: disable STOP_TRAPS simulator stops
- u7ed_rp_boot.scmd: use setup_w11a_max.scmd and 2M memory
- tools/simh/setup_w11a_(min|max).scmd: use autoconfig, cleanups
@@ -67,6 +68,10 @@ The full set of tests is only run for tagged releases.
- removed designs (drop Atlys)
- rtl/sys_gen/tst_rlink_cuff/atlys/sys_tst_rlink_cuff_atlys
- rtl/sys_gen/tst_snhumanio/atlys/sys_tst_snhumanio_atlys
- general changes
- DEC used in early documents 'segment', later on 'page' for the MMU object
- in the w11a code base (\*.vhd,\*.\*pp,\*.tcl,\*.mac) the naming was mixed
- now all changed to page,mmr\*,pdr,par; all segment,ssr\*,sdr,sar removed
### Bug Fixes
- tools/asm-11/lib
- tcode_std_start.mac: fix sdreg probe code
@@ -105,7 +110,7 @@ The full set of tests is only run for tagged releases.
- tst_mig/nexys4d/sys_tst_mig_n4d: use 100 MHz MIG SYS_CLK; add clock monitor
- tst_sram/nexys4d/sys_tst_sram_n4d: use 100 MHz MIG SYS_CLK
- w11a/nexys4d/sys_w11a_n4d: use 100 MHz MIG SYS_CLK
- */*.vhd: fixes for GHDL V0.36 -Whide warnings
- \*/\*.vhd: fixes for GHDL V0.36 -Whide warnings
### Bug Fixes
- nexys4d/mig_a.prj: BUGFIX: SysResetPolarity ACTIVE HIGH
@@ -127,22 +132,22 @@ The full set of tests is only run for tagged releases.
### Changes
- tools changes
- add -reset option to stats subcommand
- librtools/Rstats: add Reset(); drop operator-=() and operator*=()
- librtools/Rstats: add Reset(); drop operator-=() and operator\*=()
- librtcltools/RtclStats: Rename Collect->Exec, not longer const; add -reset
- libr\*/*\: Stats() not longer const; use RtclStats::Exec()
- libr\*/\*: Stats() not longer const; use RtclStats::Exec()
- other backend updates
- RparseUrl: add DirName,FileName,FileStem,FileType
- derive ReventFd and RtimerFd from Rfd
- Rw11VirtDiskFile,Rw11VirtTapeTap: use RfileFd
- Rw11Cpu: MemWriteByte(): use AddMembe()
- Rw11CntlTM11: support odd record length, close [issue #8](https://github.com/wfjm/w11/issues/8)
- *: drop superfluous \file Doxygen tag (clang -Weverything fix)
- \*: drop superfluous \file Doxygen tag (clang -Weverything fix)
- generic_so.mk: use -scrUuv for ar to avoid "'u' modifier ignored"
- tools/oskit/hook/hook_ibmon_*.tcl: check ibmon availability
- tools/oskit/hook/hook_ibmon_\*.tcl: check ibmon availability
- tap2file: add -v option
- firmware changes
- sys_w11a_arty: down-rate to 72 MHz, viv 2019.1 fails with 75 MHz
- sys_w11a_*.vmfset: add new rule for Vivado 2019.1
- sys_w11a_\*.vmfset: add new rule for Vivado 2019.1
- pdp11_vmbox: support membe for em cacc access
### Bug Fixes
@@ -169,7 +174,7 @@ The full set of tests is only run for tagged releases.
- Rw11UnitDZ11: unit
- new verification codes
- test_m9312_all.tcl: tbench for m9312
- test_dz11_*.tcl: tbench for dz11
- test_dz11_\*.tcl: tbench for dz11
- new test and demonstration codes under tools/mcode
- m9312/bootw11.mac: w11 boot for m9312
- sys/noboot.mac: boot blocker code for block 0 of disks
@@ -224,12 +229,12 @@ The full set of tests is only run for tagged releases.
- ibdr_dl11_buf: new DL11 interface with fifo buffering
- simclkv: test bench clock generator with variable period
- new verification codes
- w11a_ibtst/*: tbench for ibd_ibtst
- w11a_ibmon/*: tbench for ibd_ibmon
- w11a_ibtst/\*: tbench for ibd_ibtst
- w11a_ibmon/\*: tbench for ibd_ibmon
- w11a/test_w11a_sdreg.tcl: tbench for sdreg
- test_lp11_all.tcl: tbench for lp11 and lp11_buf
- test_pc11_*.tcl: tbench for pc11 and pc11_buf
- test_dl11_*.tcl: tbench for dl11 and dl11_buf
- test_pc11_\*.tcl: tbench for pc11 and pc11_buf
- test_dl11_\*.tcl: tbench for dl11 and dl11_buf
- new test and demonstration codes under tools/mcode
- dl11/dl11echo.mac: console interface echo tester
- sys/blink.mac: 'blinking lights' demo (rsx,bsd and other modes)
@@ -311,7 +316,7 @@ The full set of tests is only run for tagged releases.
- Digilent Arty
- Digilent Nexys4 DDR (or Nexys A7-100)
- Digilent Arty S7
- add a low level MIG interface test design `sys_tst_mig_*`
- add a low level MIG interface test design `sys_tst_mig_\*`
- update tool support
- all designs build under Vivado 2017.2 and 2018.3
- sys_w11a_as7 must be build under 2018.3 (due to MIG support constraints)
@@ -427,7 +432,7 @@ The full set of tests is only run for tagged releases.
- rw11/shell.tcl: add workaround for tclreadline and `after` interference
- firmware changes
- sys_w11_n4: reduce cache from 64 to 32 kB to keep timing closure
- changes for DM_STAT_* signals (debug and monitoring)
- changes for DM_STAT_\* signals (debug and monitoring)
- DM_STAT_SE: add elements cpbusy,idec,pcload,itimer
- DM_STAT_CA: added, used for cache monitoring
- DM_STAT_SY: removed, now replaced by DM_STAT_CA
@@ -439,7 +444,7 @@ The full set of tests is only run for tagged releases.
- pdp11_cache: drop CHIT, add DM_STAT_CA port, add detailed monitoring
- pdp11_tmu(_sb): use DM_STAT_CA instead of DM_STAT_SY
- ibdr_maxisys: add IDEC port, connect to EXTEVT of KW11P
- sys_w11a_*.vhd: use DM_STAT_EXP; IDEC to maxisys; setup PERFEXT
- sys_w11a_\*.vhd: use DM_STAT_EXP; IDEC to maxisys; setup PERFEXT
- sfs_gsim_core: new common simulation core
- use in {dcm,s6_cmt,s7_cmt}_sfs_gsim simulation models
- use in rtl/bplib/\*/tb/tb_\* test benches
@@ -458,7 +463,7 @@ The full set of tests is only run for tagged releases.
- use `[[noreturn]]` (clang -Wmissing-noreturn)
- drop never reached returns (clang -Wunreachable-code-return)
- drop `throw()` lists, use `noexcept` (clang -Wdeprecated)
- add `R*_Init` prototypes (clang -Wmissing-prototypes)
- add `R\*_Init` prototypes (clang -Wmissing-prototypes)
- now -Wunused-parameter clean (comment out unused params)
- now -Wunused-variable clean (comment out so far unused code)
- move `using namespace std` after includes (clang warning)
@@ -492,7 +497,7 @@ The full set of tests is only run for tagged releases.
- add HasPort/HasVirt(); Port() and Virt() return reference
### Bug Fixes
- RtclArgs.hpp: BUGFIX: get *_min limits correct (gcc -Wpedantic)
- RtclArgs.hpp: BUGFIX: get \*_min limits correct (gcc -Wpedantic)
- RtclArgs.cpp: BUGFIX: GetArg(): argument in wrong order (coverity)
- Rw11CntlDEUNA.cpp: BUGFIX: SetMacDefault(): resource leak (coverity)
- Rw11VirtDiskFile.cpp: BUGFIX: Open(): resource leak (coverity)
@@ -527,7 +532,7 @@ The full set of tests is only run for tagged releases.
- xviv_msg_summary: check also for .bit and .dcp files
- get Vivado 2017.2 ready (needed for Spartan-7 support)
- test Vivado 2017.3 - 2018.2 ready
- *.vmfset: update rules to cover 2017.4-2018.2
- \*.vmfset: update rules to cover 2017.4-2018.2
- all designs build under 2017.2 and 2018.2
<!-- --------------------------------------------------------------------- -->
@@ -566,14 +571,14 @@ The full set of tests is only run for tagged releases.
- s3_sram_memctl: drop superfluous idata_cei=1 in s_write2
- 17bit support for tst_sram
- tst_sram.vhd: allow AWIDTH=17; sstat_rbf_awidth instead of _wide
- tcl/tst_sram/*.tcl: 17bit support; use sstat(awidth); add isnarrow
- tcl/tst_sram/\*.tcl: 17bit support; use sstat(awidth); add isnarrow
- get Vivado 2017.1 ready
- xviv_msg_filter: add version-range tag support
- *.vmfset:
- \*.vmfset:
- drop the nonsense 'Synth 8-6014' messages
- adopt to different path used by 'Synth 8-3332' messages
- Rw11VirtDiskOver: more detailed stats
- add test_w11a_mem70.tcl; retire old tests tb_w11a_mem70*.dat
- add test_w11a_mem70.tcl; retire old tests tb_w11a_mem70\*.dat
### Bug Fixes
- shell_egd.tcl: BUGFIX: shell_pspec_map: fix mapping for addr>20000
@@ -611,7 +616,7 @@ The full set of tests is only run for tagged releases.
of ibmon and dmcmon streamlined.
- add *overlay* file system (Rw11VirtDiskOver, scheme over:) which keeps all
write in backend memory. Very convenient for development. The changes can
be written to the disk image with a tcl level command (cpu0* virt flush).
be written to the disk image with a tcl level command (cpu0\* virt flush).
- add two new 211bsd system images (oskits)
- 211bsd_rpmin: for small memory systems (512 or 672 kB)
- 211bsd_rpeth: with DEUNA Ethernet support
@@ -670,7 +675,7 @@ The full set of tests is only run for tagged releases.
- dmcmon included in sys_w11a_n4 again
- full snum generation code gives bad synthesis under Vivado (fine in ISE)
- the updated dmcmon can life with a simple, category based, snum
- move hook_*.tcl files to tools/oskiit/hook directory
- move hook_\*.tcl files to tools/oskiit/hook directory
- w11 shell .bs now support ibus register names and ranges
- rw11/dmhbpt.tcl: hb_set: use imap_range2addr, allow regnam and range
- integrate rbus monitor in w11 shell
@@ -691,15 +696,15 @@ The full set of tests is only run for tagged releases.
- RlinkConnect: add rbus monitor probe, add HasRbmon()
- RtclRlinkConnect: M_amap: -testname opt addr check; add hasrbmon get
- RtclRw11Cpu: M_(imap|rmap): -testname optional addr check
- */util.tcl: setup: now idempotent
- \*/util.tcl: setup: now idempotent
- factor out controller class specifics; add useful M_default output
- RtclRw11Cntl*Base: add classes with Rdma,Disk,Stream.Tape,Term specifics
- RtclRw11Cntl*: add class in ctor; derive from RtclRw11Cntl*Base
- RtclRw11Cntl\*Base: add classes with Rdma,Disk,Stream.Tape,Term specifics
- RtclRw11Cntl\*: add class in ctor; derive from RtclRw11Cntl\*Base
- make list cpus,cntls,units command gettable; make controller class gettable
- RtclRw11: add CpuCommands() and cpus getter
- RtclRw11Cntl: add UnitCommands() and uints and class getter
- RtclRw11Cpu: add ControllerCommands() and cntls getter
- RtclGet: add Tcl_Obj* getter
- RtclGet: add Tcl_Obj\* getter
- make attach status and attach url gettable for units
- Rw11Cntl,Rw11CntlBase: NUnit() now pure; add UnitBase()
- Rw11Unit: add IsAttached(), AttachUrl()
@@ -710,13 +715,13 @@ The full set of tests is only run for tagged releases.
- pass default scheme to RparseUrl in Open()
- add Open() overloads for Rw11VirtDiskFile and Rw11VirtDiskOver
- RparseUrl: add Set() with default scheme handling
- remove double inheritance in RtclRw11Unit* stack
- remove double inheritance in RtclRw11Unit\* stack
- RtclRw11Unit: drop fpCpu, use added Cpu()=0 instead
- RtclRw11UnitBase: add TUV,TB; add TUV* ObjUV(); inherit from TB
- RtclRw11UnitBase: add TUV,TB; add TUV\* ObjUV(); inherit from TB
- RtclRw11Unit(Disk|Stream|Tape|Term): define ObjUV();inherit from RtclRw11Unit
- RtclRw11Unit(dev): inherit from RtclRw11UnitBase
- update trace output handling
- Rw11Cntl*: use controller name as message prefix
- Rw11Cntl\*: use controller name as message prefix
- Rw11CntlPC11,Rw11CntlDL11: trace received chars
- more compact dumps, add Dump(..,detail)
- RlinkCommand: add CommandInfo()
@@ -724,9 +729,9 @@ The full set of tests is only run for tagged releases.
- RlinkCommandList: Dump(): add detail arg
- Rstats: add NameMaxLength(); Print(): add counter name
- Rw11Cntl: use Dump(detail) for PrimClist ect
- Rw11(Cntl|Unit|Virt)*,: Dump(): add detail arg
- Rw11(Cntl|Unit|Virt)\*,: Dump(): add detail arg
- many other classes: Dump(): add detail arg
- RtclRw11(Cntl|Unit|*): M_dump: use GetArgsDump and Dump detail
- RtclRw11(Cntl|Unit|\*): M_dump: use GetArgsDump and Dump detail
- update time handling
- use clock_gettime instead of gettimeofday
- add Rtime support in RtclGet/RtclSet
@@ -746,16 +751,16 @@ The full set of tests is only run for tagged releases.
- ticonv_rri: use 'rlc rawwblk' instead of 'rlc rawio -wblk'
- rbmoni/test_regs.tcl: add data/addr logic tests
- librw11/Rw11Cpu: add ModLalh()
- librtools/Rstats: add IncLogHist() and fix + and * operator definition
- librtools/Rstats: add IncLogHist() and fix + and \* operator definition
### Bug Fixes
- rlink_core: BUGFIX: correct re-transmit after nak aborts
- resolve hangup of fx2 USB controller
- was caused by inconsistent use of rx fifo thresholds
- adding more lines to monitor output (fsm_* lines for state tracking)
- adding more lines to monitor output (fsm_\* lines for state tracking)
- RlinkPort: BUGFIX: RawRead(): proper irc for exactsize=false
- Rexception: BUGFIX: add fErrtxt for proper what() return
- `rlc get logfile` or `rlc get *` crashed with segfault
- `rlc get logfile` or `rlc get \*` crashed with segfault
- error was a type mismatch in the getter declaration in RtclRlinkConnect
- fixed by changing the return type in RlinkConnect

78
rtl/w11a/tb/tb_pdp11core_stim.dat
View File

@@ -1,4 +1,4 @@
# $Id: tb_pdp11core_stim.dat 1274 2022-08-08 09:21:53Z mueller $
# $Id: tb_pdp11core_stim.dat 1280 2022-08-15 09:12:03Z mueller $
# SPDX-License-Identifier: GPL-3.0-or-later
# Copyright 2007-2022 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
#
@@ -329,14 +329,14 @@ C Setup MMU
#
wal 172300 -- kernel I space DR
bwm 8
077406 -- slf=127; ed=0(up); acf=6(w/r)
077406 -- slf=127; ed=0(up); acf=6(w/r)
077406 -- slf=127; ed=0(up); acf=6(w/r)
077406 -- slf=127; ed=0(up); acf=6(w/r)
077406 -- slf=127; ed=0(up); acf=6(w/r)
077406 -- slf=127; ed=0(up); acf=6(w/r)
077406 -- slf=127; ed=0(up); acf=6(w/r)
077406 -- slf=127; ed=0(up); acf=6(w/r)
077406 -- plf=127; ed=0(up); acf=6(w/r)
077406 -- plf=127; ed=0(up); acf=6(w/r)
077406 -- plf=127; ed=0(up); acf=6(w/r)
077406 -- plf=127; ed=0(up); acf=6(w/r)
077406 -- plf=127; ed=0(up); acf=6(w/r)
077406 -- plf=127; ed=0(up); acf=6(w/r)
077406 -- plf=127; ed=0(up); acf=6(w/r)
077406 -- plf=127; ed=0(up); acf=6(w/r)
wal 172340 -- kernel I space AR
bwm 8
000000 -- 0
@@ -1447,7 +1447,7 @@ bwm 2
wal 177572 -- MMR0
wmi 000001 -- enable
wal 172302 -- kernel I space DR segment 1 (base 20000)
wmi 077400 -- slf=127; ed=0(up); acf=0 (non-resident)
wmi 077400 -- plf=127; ed=0(up); acf=0 (non-resident)
#----------
C Exec test 20.7 (non resident abort)
wr1 020000 -- r1=20000
@@ -1470,7 +1470,7 @@ wmi 000001 -- enable and clear error bits
#----------
C Exec test 20.8 (segment length violation abort)
wal 172302 -- kernel I space DR segment 1 (base 20000)
wmi 001406 -- slf=3; ed=0(up); acf=6 (w/r)
wmi 001406 -- plf=3; ed=0(up); acf=6 (w/r)
#
wr1 020400 -- r1=20400
wr3 000016 -- r3=16 ; the -(r3) fetches the mem(14)=16
@@ -1492,7 +1492,7 @@ wmi 000001 -- enable and clear error bits
#----------
C Exec test 20.9 (read-only abort)
wal 172302 -- kernel I space DR segment 1 (base 20000)
wmi 077402 -- slf=127; ed=0(up); acf=2 (read-only)
wmi 077402 -- plf=127; ed=0(up); acf=2 (read-only)
#
wr1 020000 -- r1=20000
wr3 000016 -- r3=16 ; the -(r3) fetches the mem(14)=16
@@ -1511,7 +1511,7 @@ brm 3
#
# mmu back to default setup, disable
wal 172302 -- kernel I space DR segment 1 (base 20000)
wmi 077406 -- slf=127; ed=0(up); acf=6 (r/w)
wmi 077406 -- plf=127; ed=0(up); acf=6 (r/w)
wal 177572 -- MMR0
wmi 000000 -- disable
#----------
@@ -1521,7 +1521,7 @@ wmi 000000 -- disable
wal 177572 -- MMR0
wmi 001001 -- enable, trap enable
wal 172302 -- kernel I space DR segment 1 (base 20000)
wmi 077404 -- slf=127; ed=0(up); acf=4 (r/w, trap on r/w)
wmi 077404 -- plf=127; ed=0(up); acf=4 (r/w, trap on r/w)
#----------
C Exec test 20.10 (trap on write)
wr1 020000 -- r1=20000
@@ -1563,7 +1563,7 @@ brm 3
#
# mmu back to default setup, disable
wal 172302 -- kernel I space DR segment 1 (base 20000)
wmi 077406 -- slf=127; ed=0(up); acf=6 (r/w)
wmi 077406 -- plf=127; ed=0(up); acf=6 (r/w)
wal 177572 -- MMR0
wmi 000000 -- disable
#----------
@@ -1704,7 +1704,7 @@ C Exec test 20.19 (red stack escalation: abort kernel stack mmu abort;sp=020004)
wal 177572 -- MMR0
wmi 000001 -- enable
wal 172302 -- kernel I space DR segment 1 (base 20000)
wmi 077400 -- slf=127; ed=0(up); acf=0 (non-resident)
wmi 077400 -- plf=127; ed=0(up); acf=0 (non-resident)
#
wr0 123456 -- r0=123456
wsp 020004 -- sp=020004
@@ -1723,7 +1723,7 @@ rm d=000104 -- ! CPUERR: (rsv=1,adderr=1)
wm 000000 -- clear CPUERR
# mmu back to default setup
wal 172302 -- kernel I space DR segment 1 (base 20000)
wmi 077406 -- slf=127; ed=0(up); acf=6 (r/w)
wmi 077406 -- plf=127; ed=0(up); acf=6 (r/w)
wal 177572 -- MMR0
wmi 000000 -- disable
wal 172516 -- MMR3
@@ -1735,9 +1735,9 @@ C Setup code 21 [base 4740] (MTPx/MFPx; MMU for user mode with I/D)
#
#use setting as for test 22
wal 177600 -- user I space DR
wmi 077406 -- slf=127; ed=0(up); acf=6(w/r)
wmi 077406 -- plf=127; ed=0(up); acf=6(w/r)
wal 177620 -- user D space DR
wmi 077406 -- slf=127; ed=0(up); acf=6(w/r)
wmi 077406 -- plf=127; ed=0(up); acf=6(w/r)
wal 177640 -- user I space AR
wmi 000053 -- 53 -> maps 0 -> 5300
wal 177660 -- user D space AR
@@ -1821,9 +1821,9 @@ wps 000000 -- psw: cmode=pmode=0 (kernel)
C Setup code 22 [base 5000, use 50-57] (MMU ; run user mode code with I/D)
#
wal 177600 -- user I space DR
wmi 000002 -- slf=0; ed=0(up); acf=2(read-only)
wmi 000002 -- plf=0; ed=0(up); acf=2(read-only)
wal 177620 -- user D space DR
wmi 000006 -- slf=0; ed=0(up); acf=6(w/r)
wmi 000006 -- plf=0; ed=0(up); acf=6(w/r)
wal 177640 -- user I space AR
wmi 000053 -- 53 -> maps 0 -> 5300
wal 177660 -- user D space AR
@@ -5413,7 +5413,7 @@ bwm 2
# for the test 28/29/30x enable MMU and make address 100000 unavailable
#
wal 172310 -- kernel I space DR segment 4 (base 100000)
wmi 077400 -- slf=127; ed=0(up); acf=0 (non resident)
wmi 077400 -- plf=127; ed=0(up); acf=0 (non resident)
#
C test 44.28: If PC->bad memory, PC incremented {others} / not inc'ed {35,40}
#
@@ -5515,7 +5515,7 @@ cres -- console reset (to clear CPUERR reg)
# now reset MMU to default
#
wal 172310 -- kernel I space DR segment 4 (base 100000)
wmi 077406 -- slf=127; ed=0(up); acf=6 (r/w)
wmi 077406 -- plf=127; ed=0(up); acf=6 (r/w)
#
C test 44.39: cmode=10 will cause abort {70,J11}, treated as kmode {23,24}
#
@@ -5564,16 +5564,16 @@ cres -- console reset (to clear CPUERR reg, PSW)
C test 44.44: PDR bit<0> implemented {70} or not {others}
#
wal 172310 -- kernel I space DR, segment 4
wm 077401 -- set acf bit 0: slf=127; ed=0(up); acf=1 (r+trap)
wm 077401 -- set acf bit 0: plf=127; ed=0(up); acf=1 (r+trap)
rm d=077401 -- ! check; works as expected for 11/70
wm 077406 -- restore: slf=127; ed=0(up); acf=6(w/r)
wm 077406 -- restore: plf=127; ed=0(up); acf=6(w/r)
#
C test 44.45: PDR bit<7>(AIB any access) implemented {70} or not {others}
#
wal 172300 -- kernel I space DR, reset segment 0 and 1
bwm 2
077404 -- slf=127; ed=0(up); acf=4(w/r and trap)
077404 -- slf=127; ed=0(up); acf=4(w/r and trap)
077404 -- plf=127; ed=0(up); acf=4(w/r and trap)
077404 -- plf=127; ed=0(up); acf=4(w/r and trap)
wal 172300 -- check kernel I space DR, segment 0 and 1
brm 2
d=077404 -- !
@@ -5592,12 +5592,12 @@ rm d=123456 -- !
wm 000000 --
wal 172300 -- check kernel I space DR, segment 0 and 1
brm 2
d=077604 -- ! slf=127; ed=0(up); acf=4(w/r+trap); aib=10 (A=1,W=0)
d=077704 -- ! slf=127; ed=0(up); acf=4(w/r+trap); aib=11 (A=1,W=1)
d=077604 -- ! plf=127; ed=0(up); acf=4(w/r+trap); aib=10 (A=1,W=0)
d=077704 -- ! plf=127; ed=0(up); acf=4(w/r+trap); aib=11 (A=1,W=1)
wal 172300 -- kernel I space DR, reset segment 0 and 1
bwm 2
077406 -- slf=127; ed=0(up); acf=6(w/r)
077406 -- slf=127; ed=0(up); acf=6(w/r)
077406 -- plf=127; ed=0(up); acf=6(w/r)
077406 -- plf=127; ed=0(up); acf=6(w/r)
cres -- console reset (to clear CPUERR reg)
#
C test 44.46: Full PAR implemented {44,70,J11} or not {others}
@@ -8821,13 +8821,13 @@ bwm 8
#
wal 172300 -- kernel I space DR
brm 8
d=077406 -- ! slf=127; ed=0(up); acf=6(w/r)
d=077406 -- ! slf=127; ed=0(up); acf=6(w/r)
d=077406 -- ! slf=127; ed=0(up); acf=6(w/r)
d=077406 -- ! slf=127; ed=0(up); acf=6(w/r)
d=077406 -- ! slf=127; ed=0(up); acf=6(w/r)
d=077406 -- ! slf=127; ed=0(up); acf=6(w/r)
d=077406 -- ! slf=127; ed=0(up); acf=6(w/r)
d=077406 -- ! slf=127; ed=0(up); acf=6(w/r)
d=077406 -- ! plf=127; ed=0(up); acf=6(w/r)
d=077406 -- ! plf=127; ed=0(up); acf=6(w/r)
d=077406 -- ! plf=127; ed=0(up); acf=6(w/r)
d=077406 -- ! plf=127; ed=0(up); acf=6(w/r)
d=077406 -- ! plf=127; ed=0(up); acf=6(w/r)
d=077406 -- ! plf=127; ed=0(up); acf=6(w/r)
d=077406 -- ! plf=127; ed=0(up); acf=6(w/r)
d=077406 -- ! plf=127; ed=0(up); acf=6(w/r)
#
wal 000000 -- last cmd shouldn't be 21 or 23 ...

4
tools/asm-11/lib/defs_mmu.mac
View File

@@ -1,4 +1,4 @@
; $Id: defs_mmu.mac 1272 2022-08-07 17:37:51Z mueller $
; $Id: defs_mmu.mac 1280 2022-08-15 09:12:03Z mueller $
; SPDX-License-Identifier: GPL-3.0-or-later
; Copyright 2015-2022 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
;
@@ -44,7 +44,7 @@
;
; symbol definitions for pdr regs
;
md.slf = 000400 ; LSB of slf field
md.plf = 000400 ; MSB of plf field
md.aia = 000200 ; access a, any access
md.aiw = 000100 ; access w, write access
md.dwn = 000010 ; ed field 1, down expansion

4
tools/asm-11/lib/mminki.mac
View File

@@ -1,4 +1,4 @@
; $Id: mminki.mac 1184 2019-07-10 20:39:44Z mueller $
; $Id: mminki.mac 1280 2022-08-15 09:12:03Z mueller $
; SPDX-License-Identifier: GPL-3.0-or-later
; Copyright 2016- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
;
@@ -18,7 +18,7 @@ mminki:
mov r1,-(sp)
;
mov #kipdr,r0 ; kerel I space DR
mov #077406,r1 ; slf=127; ed=0(up); acf=6(w/r)
mov #077406,r1 ; plf=127; ed=0(up); acf=6(w/r)
;
mov r1,(r0)+ ; kipdr(0)
mov r1,(r0)+ ; kipdr(1)

75
tools/src/librwxxtpp/RtclRw11Cpu.cpp
View File

@@ -1,10 +1,11 @@
// $Id: RtclRw11Cpu.cpp 1249 2022-07-08 06:27:59Z mueller $
// $Id: RtclRw11Cpu.cpp 1280 2022-08-15 09:12:03Z mueller $
// SPDX-License-Identifier: GPL-3.0-or-later
// Copyright 2013-2022 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
//
// Revision History:
// Date Rev Version Comment
// 2022--7-07 1249 1.2.34 BUGFIX: quit before mem write if asm-11 error seen
// 2022-08-11 1276 1.2.35 ssr->mmr rename
// 2022-07-07 1249 1.2.34 BUGFIX: quit before mem write if asm-11 error seen
// 2019-06-29 1175 1.2.33 M_ldabs(): add missing OptValid() call
// 2019-06-07 1160 1.2.32 use RtclStats::Exec()
// 2019-04-30 1143 1.2.31 add HasM9312() getter
@@ -1355,7 +1356,7 @@ int RtclRw11Cpu::M_show(RtclArgs& args)
sos << endl;
} else if (opt == "-mmu") {
uint16_t ssr[4];
uint16_t mmr[4];
uint16_t asr[3][32];
const char* pmode[3] = {"km","sm","um"};
const char* acf[8] = {"nres ",
@@ -1369,63 +1370,63 @@ int RtclRw11Cpu::M_show(RtclArgs& args)
{
lock_guard<RlinkConnect> lock(Connect());
RlinkCommandList clist;
clist.AddWreg(base + Rw11Cpu::kCPAL, 0177572);
clist.AddRblk(base + Rw11Cpu::kCPMEMI, ssr, 3);
clist.AddWreg(base + Rw11Cpu::kCPAL, 0172516);
clist.AddRblk(base + Rw11Cpu::kCPMEMI, ssr+3, 1);
clist.AddWreg(base + Rw11Cpu::kCPAL, Rw11Cpu::kMMUMMR0);
clist.AddRblk(base + Rw11Cpu::kCPMEMI, mmr, 3);
clist.AddWreg(base + Rw11Cpu::kCPAL, Rw11Cpu::kMMUMMR3);
clist.AddRblk(base + Rw11Cpu::kCPMEMI, mmr+3, 1);
if (!Server().Exec(clist, emsg)) return args.Quit(emsg);
clist.Clear();
clist.AddWreg(base + Rw11Cpu::kCPAL, 0172300);
clist.AddWreg(base + Rw11Cpu::kCPAL, Rw11Cpu::kMMUPDRK);
clist.AddRblk(base + Rw11Cpu::kCPMEMI, asr[0], 32);
clist.AddWreg(base + Rw11Cpu::kCPAL, 0172200);
clist.AddWreg(base + Rw11Cpu::kCPAL, Rw11Cpu::kMMUPDRS);
clist.AddRblk(base + Rw11Cpu::kCPMEMI, asr[1], 32);
clist.AddWreg(base + Rw11Cpu::kCPAL, 0177600);
clist.AddWreg(base + Rw11Cpu::kCPAL, Rw11Cpu::kMMUPDRU);
clist.AddRblk(base + Rw11Cpu::kCPMEMI, asr[2], 32);
if (!Server().Exec(clist, emsg)) return args.Quit(emsg);
}
uint16_t ssr1_0_reg = (ssr[1] ) & 07;
int16_t ssr1_0_val = (ssr[1]>> 3) & 37;
uint16_t ssr1_1_reg = (ssr[1]>> 8) & 07;
int16_t ssr1_1_val = (ssr[1]>>11) & 37;
uint16_t ssr3_ubmap = (ssr[3]>> 5) & 01;
uint16_t ssr3_22bit = (ssr[3]>> 4) & 01;
uint16_t ssr3_d_km = (ssr[3]>> 2) & 01;
uint16_t ssr3_d_sm = (ssr[3]>> 1) & 01;
uint16_t ssr3_d_um = (ssr[3] ) & 01;
uint16_t mmr1_0_reg = (mmr[1] ) & 07;
int16_t mmr1_0_val = (mmr[1]>> 3) & 37;
uint16_t mmr1_1_reg = (mmr[1]>> 8) & 07;
int16_t mmr1_1_val = (mmr[1]>>11) & 37;
uint16_t mmr3_ubmap = (mmr[3]>> 5) & 01;
uint16_t mmr3_22bit = (mmr[3]>> 4) & 01;
uint16_t mmr3_d_km = (mmr[3]>> 2) & 01;
uint16_t mmr3_d_sm = (mmr[3]>> 1) & 01;
uint16_t mmr3_d_um = (mmr[3] ) & 01;
sos << "mmu:" << endl;
sos << "ssr0=" << RosPrintBvi(ssr[0],8) << endl;
if (ssr1_0_val & 020) ssr1_0_val |= 0177740;
if (ssr1_1_val & 020) ssr1_1_val |= 0177740;
sos << "ssr1=" << RosPrintBvi(ssr[1],8);
if (ssr1_0_val) sos << " r" << ssr1_0_reg
<< ":" << RosPrintf(ssr1_0_val,"d",3);
if (ssr1_1_val) sos << " r" << ssr1_1_reg
<< ":" << RosPrintf(ssr1_1_val,"d",3);
sos << "mmr0=" << RosPrintBvi(mmr[0],8) << endl;
if (mmr1_0_val & 020) mmr1_0_val |= 0177740;
if (mmr1_1_val & 020) mmr1_1_val |= 0177740;
sos << "mmr1=" << RosPrintBvi(mmr[1],8);
if (mmr1_0_val) sos << " r" << mmr1_0_reg
<< ":" << RosPrintf(mmr1_0_val,"d",3);
if (mmr1_1_val) sos << " r" << mmr1_1_reg
<< ":" << RosPrintf(mmr1_1_val,"d",3);
sos << endl;
sos << "ssr2=" << RosPrintBvi(ssr[2],8) << endl;
sos << "ssr3=" << RosPrintBvi(ssr[3],8)
<< " ubmap=" << ssr3_ubmap
<< " 22bit=" << ssr3_22bit
<< " d-space k,s,u=" << ssr3_d_km
<< "," << ssr3_d_sm << "," << ssr3_d_um << endl;
sos << "mmr2=" << RosPrintBvi(mmr[2],8) << endl;
sos << "mmr3=" << RosPrintBvi(mmr[3],8)
<< " ubmap=" << mmr3_ubmap
<< " 22bit=" << mmr3_22bit
<< " d-space k,s,u=" << mmr3_d_km
<< "," << mmr3_d_sm << "," << mmr3_d_um << endl;
for (size_t m=0; m<3; m++) {
sos << pmode[m] << " "
<< " I pdr slf aw d acf I par"
<< " I pdr plf aw d acf I par"
<< " "
<< " D pdr slf aw d acf D par" << endl;
<< " D pdr plf aw d acf D par" << endl;
for (size_t i=0; i<=7; i++) {
sos << " " << i << " ";
for (size_t s=0; s<=1; s++) {
if (s!=0) sos << " ";
uint16_t pdr = asr[m][i +8*s];
uint16_t par = asr[m][i+16+8*s];
uint16_t pdr_slf = (pdr>>8) & 0177;
uint16_t pdr_plf = (pdr>>8) & 0177;
uint16_t pdr_a = (pdr>>7) & 01;
uint16_t pdr_w = (pdr>>6) & 01;
uint16_t pdr_e = (pdr>>3) & 01;
uint16_t pdr_acf = (pdr) & 07;
sos<< RosPrintBvi(pdr,8)
<< " " << RosPrintf(pdr_slf,"d",3)
<< " " << RosPrintf(pdr_plf,"d",3)
<< " " << pdr_a << pdr_w
<< " " << (pdr_e ? "d" : "u")
<< " " << acf[pdr_acf]

14
tools/tbench/w11a_cmon/test_cmon_logs.tcl
View File

@@ -1,4 +1,4 @@
# $Id: test_cmon_logs.tcl 1272 2022-08-07 17:37:51Z mueller $
# $Id: test_cmon_logs.tcl 1280 2022-08-15 09:12:03Z mueller $
# SPDX-License-Identifier: GPL-3.0-or-later
# Copyright 2015-2022 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
#
@@ -572,11 +572,11 @@ v..mmu: .word vh.mmu ; vec 250 (MMU)
.word cp.pr7
;
. = 1000
start: mov #<77400+md.arw>,@#<kipdr+00> ; s0: slf=127; ed=0; acf=rw
start: mov #<77400+md.arw>,@#<kipdr+00> ; s0: plf=127; ed=0; acf=rw
mov #000000,@#<kipar+00> ; 1-to-1
mov #<77400+md.atw>,@#<kipdr+02> ; s1: slf=127; ed=0; acf=rw,trap-w
mov #<77400+md.atw>,@#<kipdr+02> ; s1: plf=127; ed=0; acf=rw,trap-w
mov #000200,@#<kipar+02> ; 1-to-1
mov #<77400+md.arw>,@#<kipdr+16> ; s7: slf=127; ed=0; acf=rw
mov #<77400+md.arw>,@#<kipdr+16> ; s7: plf=127; ed=0; acf=rw
mov #177600,@#<kipar+16> ; to io page (22 bit)
mov #234,vtst
mov #m3.e22,@#mmr3 ; enable 22bit mode
@@ -772,10 +772,10 @@ v..mmu: .word vh.mmu ; vec 250 (MMU)
.word cp.pr7
;
. = 1000
start: mov #<77400+md.arw>,@#<kipdr+00> ; s0: slf=127; ed=0; acf=rw
start: mov #<77400+md.arw>,@#<kipdr+00> ; s0: plf=127; ed=0; acf=rw
mov #000000,@#<kipar+00> ; 1-to-1
mov #077400,@#<kipdr+02> ; s1: slf=127; ed=0; acf=abo
mov #<77400+md.arw>,@#<kipdr+16> ; s7: slf=127; ed=0; acf=rw
mov #077400,@#<kipdr+02> ; s1: plf=127; ed=0; acf=abo
mov #<77400+md.arw>,@#<kipdr+16> ; s7: plf=127; ed=0; acf=rw
mov #177600,@#<kipar+16> ; to io page (22 bit)
mov #m3.e22,@#mmr3 ; enable 22bit mode
mov #m0.ena,@#mmr0 ; enable mmu

4
tools/tcl/rw11/defs.tcl
View File

@@ -1,4 +1,4 @@
# $Id: defs.tcl 1274 2022-08-08 09:21:53Z mueller $
# $Id: defs.tcl 1280 2022-08-15 09:12:03Z mueller $
# SPDX-License-Identifier: GPL-3.0-or-later
# Copyright 2014-2022 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
#
@@ -80,7 +80,7 @@ namespace eval rw11 {
set A_PAR_SM 0172240
set A_PDR_UM 0177600
set A_PAR_UM 0177640
regdsc PDR {slf 14 7} {aia 7} {aiw 6} {ed 3} {acf 2 3}
regdsc PDR {plf 14 7} {aia 7} {aiw 6} {ed 3} {acf 2 3}
#
# PIRQ - Program Interrupt Requests -------------------------------
set A_PIRQ 0177772

4
tools/tcl/rw11/shell.tcl
View File

@@ -1,4 +1,4 @@
# $Id: shell.tcl 1177 2019-06-30 12:34:07Z mueller $
# $Id: shell.tcl 1280 2022-08-15 09:12:03Z mueller $
# SPDX-License-Identifier: GPL-3.0-or-later
# Copyright 2015-2018 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
#
@@ -635,7 +635,7 @@ namespace eval rw11 {
append rval "\n MS - for memory access via mmu mode=M and space=S"
append rval "\n - M (mode) as c,p,k,s,u for cm,pm,kern,sup,user"
append rval "\n - S (space) as i,d for instruction,data"
append rval "\n i - print as intructuion with dasm"
append rval "\n i - print as instruction with dasm"
append rval "\n a - print as ascii"
append rval "\n d - print as decimal"
append rval "\n x - print as hex"

57
tools/tcode/cpu_mmu.mac
View File

@@ -1,4 +1,4 @@
; $Id: cpu_mmu.mac 1272 2022-08-07 17:37:51Z mueller $
; $Id: cpu_mmu.mac 1280 2022-08-15 09:12:03Z mueller $
; SPDX-License-Identifier: GPL-3.0-or-later
; Copyright 2022- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
;
@@ -72,7 +72,7 @@ ta0101: mov #000401,r5 ; pattern master
sob r1,1200$
;
; and read back again
; pdr only slf,ed and acf fields are checked
; pdr only plf,ed and acf fields are checked
; par all 18 bits are write/readable
mov r5,r0 ; start pattern
com r0 ; complemented
@@ -125,7 +125,7 @@ ta0102:
sob r1,100$
; setup kernel I
mov #kipdr,r0
mov #<127.*md.slf>!md.arw,r1 ; slf=127; ed=0(up); acf=6(w/r)
mov #<127.*md.plf>!md.arw,r1 ; plf=127; ed=0(up); acf=6(w/r)
mov r1,(r0)+ ; kipdr0
mov r1,(r0)+ ; kipdr1
mov r1,(r0)+ ; kipdr2
@@ -145,7 +145,7 @@ ta0102:
mov #177600,(r0)+ ; kipar7 (map I/O page)
; setup kernel D
mov #kdpdr,r0
mov r1,16(r0) ; kdpdr7 slf=127; ed=0(up); acf=6(w/r)
mov r1,16(r0) ; kdpdr7 plf=127; ed=0(up); acf=6(w/r)
mov #kdpar,r0
mov #177600,16(r0) ; kdpar7 (map I/O page)
;
@@ -313,7 +313,7 @@ tb0301:
; run code vc0 in user mode --------------------------------
;
; set user mode pdr/par, only short segment 0
mov #<8.*md.slf>!md.arw,uipdr0
mov #<8.*md.plf>!md.arw,uipdr0
mov #<vc0/100>,uipar0
; setup data for user mode run
mov #023456,vc0v0;
@@ -321,7 +321,7 @@ tb0301:
mov #077321,vc0v2
; start code in user mode
mov #1000$,vhustp ; setup continuation address
mov #cp.cmu,-(sp) ; next psw: user mode
mov #<cp.cmu!cp.pmu>,-(sp) ; next psw: user mode
clr -(sp) ; will start at 0
rti ; and launch it
halt
@@ -339,7 +339,7 @@ tb0301:
; run code vc0 in supervisor mode --------------------------
;
; set supervisor mode pdr/par, only short segment 0
mov #<8.*md.slf>!md.arw,sipdr0
mov #<8.*md.plf>!md.arw,sipdr0
mov #<vc0/100>,sipar0
; setup data for user mode run
mov #017171,vc0v0
@@ -347,7 +347,7 @@ tb0301:
mov #100123,vc0v2
; start code in supervisor mode
mov #2000$,vhustp ; setup continuation address
mov #cp.cms,-(sp) ; next psw: supervisor mode
mov #<cp.cms!cp.pms>,-(sp) ; next psw: supervisor mode
clr -(sp) ; will start at 0
rti ; and launch it
halt
@@ -390,9 +390,9 @@ tb0302:
; run code vc1 in user mode --------------------------------
;
; set user mode pdr/par, only short segment 0; I and D
mov #<8.*md.slf>!md.arw,uipdr0
mov #<8.*md.plf>!md.arw,uipdr0
mov #<vc1/100>,uipar0
mov #<8.*md.slf>!md.arw,udpdr0
mov #<8.*md.plf>!md.arw,udpdr0
mov #<vc1dat/100>,udpar0
; setup data for user mode run
mov #020305,vc1v0
@@ -400,7 +400,7 @@ tb0302:
mov #033121,vc1v2
; start code in user mode
mov #1000$,vhustp ; setup continuation address
mov #cp.cmu,-(sp) ; next psw: user mode
mov #<cp.cmu!cp.pmu>,-(sp) ; next psw: user mode
clr -(sp) ; will start at 0
rti ; and launch it
halt
@@ -434,6 +434,7 @@ tb0302:
scc ; C=1
mfpd (r5)
hcmpeq cp.psw,(r4)+ ; check cc
hcmpeq (sp)+,-6(r4) ; check data
cmp r4,r3 ; more to do ?
blo 2000$
;
@@ -456,9 +457,37 @@ tb0302:
ccc ; C=0
mfpi (r5)
hcmpeq cp.psw,(r4)+ ; check cc
hcmpeq (sp)+,-6(r4) ; check data
cmp r4,r3 ; more to do ?
blo 3000$
;
; Test MTPD,MFPD with @(sp)+
; Note: (sp)+ is not a useful address mode for MTPD
; It will use the cm sp as address in pm.
; So @(sp)+ is the only mode with sp in src worth to be tested
;
clr vc1v0
push #<vc1v0-vc1dat> ; D addr of vc1v0
push #054321 ; data to mtpd
mtpd @(sp)+ ; reads data first, then dst addr
hcmpeq vc1v0,#054321 ; check at destination
inc vc1v0
push #<vc1v0-vc1dat> ; D addr of vc1v0
mfpd @(sp)+
hcmpeq (sp)+,#054322 ; check
;
; Test MTPI,MFPI with @(sp)+
;
clr vc1ida
push #<vc1ida-vc1> ; I addr of vc1ida
push #012321 ; data to mtpi
mtpi @(sp)+ ; reads data first, then dst addr
hcmpeq vc1ida,#012321 ; check at destination
inc vc1ida
push #<vc1ida-vc1> ; I addr of vc1ida
mfpi @(sp)+
hcmpeq (sp)+,#012322 ; check
;
; Test MFPD,MFPI and MTPD,MTPI for sp register access
; accessing sp will access user mode stack pointer (which is != kernel stack)
;
@@ -651,7 +680,7 @@ vc0v2: .word 0
; does operations with vc1v0, vc1v1, vc1v2
; these location are usually set before and checked afterwards in kernel mode
;
. = 101000 ; I space
. = 101000 ; I space ------------------------------------
vc1: mov #<vc1v0-vc1dat>,sp ; initialize stack
mov #<vc1v0-vc1dat>,r5 ; initialize data pointer
call 1000$
@@ -663,9 +692,9 @@ vc1: mov #<vc1v0-vc1dat>,sp ; initialize stack
2000$: add 2(r5),4(r5) ; will access vc1v1 and vc1v2
return
;
vc1ida: .word 0 ; I space location, MTPI target
vc1ida: .word 0 ; I space location, M*PI read/write target
;
. = 102000 ; D space
. = 102000 ; D space ------------------------------------
vc1dat: .blkw 16. ; small stack space
vc1stk:
vc1v0: .word 0