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ensure that essential vivado warnings are not discarded

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- xviv_msg_filter: display INFO Common 17-14 'further message disabled'
- viv_tools_build.tcl: increase message limits (all 200, some 5000)
- sys_w11a_*.vmfset: correct for thus far missed entries
This commit is contained in:
wfjm
2018-12-07 19:38:32 +01:00
parent 74ef4925b4
commit 5d34d1fad6
8 changed files with 148 additions and 20 deletions
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8
doc/CHANGELOG.md
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@@ -79,8 +79,12 @@ The full set of tests is only run for tagged releases.
- use in {dcm,s6_cmt,s7_cmt}_sfs_gsim simulation models
- use in rtl/bplib/*/tb/tb_* test benches
- remove s7_cmt_sfs_tb
- RtclRw11Unit: fix for clang: M_virt() now public
- Rw11VirtDisk: keep track of disk geometry
- tools changes
- xviv_msg_filter: display INFO Common 17-14 'further message disabled'
- viv_tools_build.tcl: increase message limits (all 200, some 5000)
- backend changes
- RtclRw11Unit: fix for clang: M_virt() now public
- Rw11VirtDisk: keep track of disk geometry
- backend code review:
- use for C++ compiles `-Wpedantic` (in addition to `-Wall` and `-Wextra`)
- fixes for uninitialized variables (coverity, all uncritical)

31
rtl/sys_gen/w11a/arty_bram/sys_w11a_br_arty.vmfset
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@@ -1,4 +1,4 @@
# $Id: sys_w11a_br_arty.vmfset 1056 2018-10-13 16:01:17Z mueller $
# $Id: sys_w11a_br_arty.vmfset 1073 2018-11-23 18:05:51Z mueller $
#
# ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
[syn]
@@ -17,16 +17,35 @@ I [Designutils 20-1567] # generic
# net without driver -------------------------------------------
# unconnected ports --------------------------------------------
I [Synth 8-3331] RB_MREQ # generic
I [Synth 8-3331] IB_MREQ # generic
I [Synth 8-3331] RB_MREQ # generic
I [Synth 8-3331] DM_STAT_CO # generic
I [Synth 8-3331] DM_STAT_DP # generic
I [Synth 8-3331] DM_STAT_EXP # generic
I [Synth 8-3331] DM_STAT_SE # generic
I [Synth 8-3331] DM_STAT_VM # generic
I [Synth 8-3331] CP_STAT # generic
I [Synth 8-3331] SER_MONI # generic
# --> only 128 kB memory available
i [Synth 8-3331] pdp11_bram_memctl .* ADDR[1(6|7|8|9)] # OK 2018-10-13
# --> msec indeed not used
i [Synth 8-3331] ibdr_rl11 .* CE_MSEC # OK 2018-10-13
# --> ireg indeed not fully used # OK 2018-11-18
i [Synth 8-3331] pdp11_sequencer .* IREG[1(1|2|3|4)]
# --> ccin indedd not fully used # OK 2018-11-18
i [Synth 8-3331] pdp11_lunit .* CCIN[(1|2)]
# --> some psr bits are used # OK 2018-11-18
i [Synth 8-3331] pdp11_psr .* DIN[(8|9|10)]
# --> not all moni fields used # OK 2018-11-18
i [Synth 8-3331] pdp11_mmu_ssr12 .* MONI[(idone|trace_prev)]
# --> not all CNTL fieds used; also 6 LSBs from vaddr # OK 2018-11-18
i [Synth 8-3331] pdp11_mmu .* CNTL[trap_done]
i [Synth 8-3331] pdp11_mmu .* VADDR[(0|1|2|3|4|5)]
# --> so far no usage of usec and msec pulse # OK 2018-11-18
i [Synth 8-3331] rlink_sp2c .* (CE_USEC|CE_MSEC)
# --> only small memory available # OK 2018-11-23
i [Synth 8-3331] pdp11_bram_memctl .* ADDR[1(6|7|8|9)]
# --> msec indeed not used # OK 2018-11-23
i [Synth 8-3331] ibdr_rl11 .* CE_MSEC
# --> ei_ack not used, interrupt request cleared via register # OK 2018-11-23
i [Synth 8-3331] ibdr_deuna .* EI_ACK
i [Synth 8-3331] ibd_iist .* EI_ACK
# sequential element removed (2017.1 nonsense) -----------------
I [Synth 8-6014] _reg # generic

27
rtl/sys_gen/w11a/artys7_bram/sys_w11a_br_as7.vmfset
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@@ -1,4 +1,4 @@
# $Id: sys_w11a_br_as7.vmfset 1056 2018-10-13 16:01:17Z mueller $
# $Id: sys_w11a_br_as7.vmfset 1073 2018-11-23 18:05:51Z mueller $
#
# ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
[syn]
@@ -17,16 +17,35 @@ I [Designutils 20-1567] # generic
# net without driver -------------------------------------------
# unconnected ports --------------------------------------------
I [Synth 8-3331] RB_MREQ # generic
I [Synth 8-3331] IB_MREQ # generic
I [Synth 8-3331] RB_MREQ # generic
I [Synth 8-3331] DM_STAT_CO # generic
I [Synth 8-3331] DM_STAT_DP # generic
I [Synth 8-3331] DM_STAT_EXP # generic
I [Synth 8-3331] DM_STAT_SE # generic
I [Synth 8-3331] DM_STAT_VM # generic
I [Synth 8-3331] CP_STAT # generic
I [Synth 8-3331] SER_MONI # generic
# --> ireg indeed not fully used # OK 2018-11-18
i [Synth 8-3331] pdp11_sequencer .* IREG[1(1|2|3|4)]
# --> ccin indedd not fully used # OK 2018-11-18
i [Synth 8-3331] pdp11_lunit .* CCIN[(1|2)]
# --> some psr bits are used # OK 2018-11-18
i [Synth 8-3331] pdp11_psr .* DIN[(8|9|10)]
# --> not all moni fields used # OK 2018-11-18
i [Synth 8-3331] pdp11_mmu_ssr12 .* MONI[(idone|trace_prev)]
# --> not all CNTL fieds used; also 6 LSBs from vaddr # OK 2018-11-18
i [Synth 8-3331] pdp11_mmu .* CNTL[trap_done]
i [Synth 8-3331] pdp11_mmu .* VADDR[(0|1|2|3|4|5)]
# --> so far no usage of usec and msec pulse # OK 2018-11-18
i [Synth 8-3331] rlink_sp2c .* (CE_USEC|CE_MSEC)
# --> pdp11_hio70_arty doesn't use MEM_ACT # OK 2018-08-11
i [Synth 8-3331] pdp11_hio70_artys7.*MEM_ACT_(R|W)
# --> only 128 kB memory available
i [Synth 8-3331] pdp11_bram_memctl .* ADDR[1(6|7|8|9)] # OK 2018-10-13
# --> only small memory available # OK 2018-11-23
i [Synth 8-3331] pdp11_bram_memctl .* ADDR[1(6|7|8|9)]
# --> ei_ack not used, interrupt request cleared via register # OK 2018-11-23
i [Synth 8-3331] ibdr_deuna .* EI_ACK
i [Synth 8-3331] ibd_iist .* EI_ACK
# sequential element removed (2017.1 nonsense) -----------------
I [Synth 8-6014] _reg # generic

27
rtl/sys_gen/w11a/basys3/sys_w11a_b3.vmfset
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@@ -1,4 +1,4 @@
# $Id: sys_w11a_b3.vmfset 1056 2018-10-13 16:01:17Z mueller $
# $Id: sys_w11a_b3.vmfset 1073 2018-11-23 18:05:51Z mueller $
#
# ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
[syn]
@@ -17,10 +17,35 @@ I [Designutils 20-1567] # generic
# net without driver -------------------------------------------
# unconnected ports --------------------------------------------
I [Synth 8-3331] IB_MREQ # generic
I [Synth 8-3331] RB_MREQ # generic
I [Synth 8-3331] DM_STAT_CO # generic
I [Synth 8-3331] DM_STAT_DP # generic
I [Synth 8-3331] DM_STAT_EXP # generic
I [Synth 8-3331] DM_STAT_SE # generic
I [Synth 8-3331] DM_STAT_VM # generic
I [Synth 8-3331] CP_STAT # generic
I [Synth 8-3331] SER_MONI # generic
# --> ireg indeed not fully used # OK 2018-11-18
i [Synth 8-3331] pdp11_sequencer .* IREG[1(1|2|3|4)]
# --> ccin indedd not fully used # OK 2018-11-18
i [Synth 8-3331] pdp11_lunit .* CCIN[(1|2)]
# --> some psr bits are used # OK 2018-11-18
i [Synth 8-3331] pdp11_psr .* DIN[(8|9|10)]
# --> not all moni fields used # OK 2018-11-18
i [Synth 8-3331] pdp11_mmu_ssr12 .* MONI[(idone|trace_prev)]
# --> not all CNTL fieds used; also 6 LSBs from vaddr # OK 2018-11-18
i [Synth 8-3331] pdp11_mmu .* CNTL[trap_done]
i [Synth 8-3331] pdp11_mmu .* VADDR[(0|1|2|3|4|5)]
# --> so far no usage of usec and msec pulse # OK 2018-11-18
i [Synth 8-3331] rlink_sp2c .* (CE_USEC|CE_MSEC)
# --> small memory, not all addr lines connected # OK 2018-11-23
i [Synth 8-3331] pdp11_bram_memctl .* ADDR[1(6|7|8|9)]
# --> msec indeed not used # OK 2018-11-23
i [Synth 8-3331] ibdr_rl11 .* CE_MSEC
# --> ei_ack not used, interrupt request cleared via register # OK 2018-11-23
i [Synth 8-3331] ibdr_deuna .* EI_ACK
i [Synth 8-3331] ibd_iist .* EI_ACK
# sequential element removed (2017.1 nonsense) -----------------
I [Synth 8-6014] _reg # generic

27
rtl/sys_gen/w11a/cmoda7/sys_w11a_c7.vmfset
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@@ -1,4 +1,4 @@
# $Id: sys_w11a_c7.vmfset 1056 2018-10-13 16:01:17Z mueller $
# $Id: sys_w11a_c7.vmfset 1073 2018-11-23 18:05:51Z mueller $
#
# ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
[syn]
@@ -23,10 +23,35 @@ i [Synth 8-3917] O_RGBLED0_N[\d]
i [Synth 8-3295] EHIO:DSP_DP[(4|5|6|7)]
# unconnected ports --------------------------------------------
I [Synth 8-3331] IB_MREQ # generic
I [Synth 8-3331] RB_MREQ # generic
I [Synth 8-3331] DM_STAT_CO # generic
I [Synth 8-3331] DM_STAT_DP # generic
I [Synth 8-3331] DM_STAT_EXP # generic
I [Synth 8-3331] DM_STAT_SE # generic
I [Synth 8-3331] DM_STAT_VM # generic
I [Synth 8-3331] CP_STAT # generic
I [Synth 8-3331] SER_MONI # generic
# --> ireg indeed not fully used # OK 2018-11-18
i [Synth 8-3331] pdp11_sequencer .* IREG[1(1|2|3|4)]
# --> ccin indedd not fully used # OK 2018-11-18
i [Synth 8-3331] pdp11_lunit .* CCIN[(1|2)]
# --> some psr bits are used # OK 2018-11-18
i [Synth 8-3331] pdp11_psr .* DIN[(8|9|10)]
# --> not all moni fields used # OK 2018-11-18
i [Synth 8-3331] pdp11_mmu_ssr12 .* MONI[(idone|trace_prev)]
# --> not all CNTL fieds used; also 6 LSBs from vaddr # OK 2018-11-18
i [Synth 8-3331] pdp11_mmu .* CNTL[trap_done]
i [Synth 8-3331] pdp11_mmu .* VADDR[(0|1|2|3|4|5)]
# --> so far no usage of usec and msec pulse # OK 2018-11-18
i [Synth 8-3331] rlink_sp2c .* (CE_USEC|CE_MSEC)
# --> small memory, not all addr lines connected # OK 2018-11-23
i [Synth 8-3331] pdp11_bram_memctl .* ADDR[1(6|7|8|9)]
# --> msec indeed not used # OK 2018-11-23
i [Synth 8-3331] ibdr_rl11 .* CE_MSEC
# --> ei_ack not used, interrupt request cleared via register # OK 2018-11-23
i [Synth 8-3331] ibdr_deuna .* EI_ACK
i [Synth 8-3331] ibd_iist .* EI_ACK
# sequential element removed (2017.1 nonsense) -----------------
I [Synth 8-6014] _reg # generic

27
rtl/sys_gen/w11a/nexys4/sys_w11a_n4.vmfset
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@@ -1,4 +1,4 @@
# $Id: sys_w11a_n4.vmfset 1056 2018-10-13 16:01:17Z mueller $
# $Id: sys_w11a_n4.vmfset 1073 2018-11-23 18:05:51Z mueller $
#
# ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
[syn]
@@ -19,10 +19,35 @@ I [Designutils 20-1567]
i [Synth 8-3917] O_RGBLED0[\d]
# unconnected ports --------------------------------------------
I [Synth 8-3331] IB_MREQ # generic
I [Synth 8-3331] RB_MREQ # generic
I [Synth 8-3331] DM_STAT_CO # generic
I [Synth 8-3331] DM_STAT_DP # generic
I [Synth 8-3331] DM_STAT_EXP # generic
I [Synth 8-3331] DM_STAT_SE # generic
I [Synth 8-3331] DM_STAT_VM # generic
I [Synth 8-3331] CP_STAT # generic
I [Synth 8-3331] SER_MONI # generic
# --> ireg indeed not fully used # OK 2018-11-18
i [Synth 8-3331] pdp11_sequencer .* IREG[1(1|2|3|4)]
# --> ccin indedd not fully used # OK 2018-11-18
i [Synth 8-3331] pdp11_lunit .* CCIN[(1|2)]
# --> some psr bits are used # OK 2018-11-18
i [Synth 8-3331] pdp11_psr .* DIN[(8|9|10)]
# --> not all moni fields used # OK 2018-11-18
i [Synth 8-3331] pdp11_mmu_ssr12 .* MONI[(idone|trace_prev)]
# --> not all CNTL fieds used; also 6 LSBs from vaddr # OK 2018-11-18
i [Synth 8-3331] pdp11_mmu .* CNTL[trap_done]
i [Synth 8-3331] pdp11_mmu .* VADDR[(0|1|2|3|4|5)]
# --> so far no usage of usec and msec pulse # OK 2018-11-18
i [Synth 8-3331] rlink_sp2c .* (CE_USEC|CE_MSEC)
# --> msec indeed not used # OK 2018-11-23
i [Synth 8-3331] ibdr_rl11 .* CE_MSEC
# --> ei_ack not used, interrupt request cleared via register # OK 2018-11-23
i [Synth 8-3331] ibdr_deuna .* EI_ACK
i [Synth 8-3331] ibd_iist .* EI_ACK
# --> i_mem_wait not used in as driver # OK 2018-11-23
i [Synth 8-3331] nx_cram_memctl_as .* I_MEM_WAIT
# sequential element removed (2017.1 nonsense) -----------------
I [Synth 8-6014] _reg # generic

7
tools/bin/xviv_msg_filter
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@@ -1,5 +1,5 @@
#!/usr/bin/perl -w
# $Id: xviv_msg_filter 1039 2018-08-12 10:04:09Z mueller $
# $Id: xviv_msg_filter 1072 2018-11-18 22:27:35Z mueller $
#
# Copyright 2016-2018 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
#
@@ -14,6 +14,7 @@
#
# Revision History:
# Date Rev Version Comment
# 2018-11-18 1072 1.1.2 display INFO Common 17-14 'further message disabled'
# 2018-08-11 1039 1.1.1 allow {yyyy.x} tags (in addition to ranges)
# 2017-06-06 909 1.1 add version-range tags
# 2016-06-04 772 1.0 Initial version
@@ -103,7 +104,9 @@ foreach my $m (@mlist) {
}
}
$msgmatch = 1 if $msev eq 'INFO'; # accept all INFO
if ($mcode ne 'Common 17-14' && $msev eq 'INFO') {
$msgmatch = 1; # accept all INFO except 'further msg disabled'
}
if ($msgmatch) {
$m->[3] += 1;

14
tools/vivado/viv_tools_build.tcl
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@@ -1,10 +1,11 @@
# $Id: viv_tools_build.tcl 895 2017-05-07 07:38:47Z mueller $
# $Id: viv_tools_build.tcl 1072 2018-11-18 22:27:35Z mueller $
#
# Copyright 2015-2016 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
# Copyright 2015-2018 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
# License disclaimer see License.txt in $RETROBASE directory
#
# Revision History:
# Date Rev Version Comment
# 2018-11-18 1072 1.2.2 increase message limits (all 200, some 5000)
# 2016-09-18 809 1.2.1 keep hierarchy for synthesis only runs
# 2016-05-22 767 1.2 cleaner setup handling; use explore flows
# add 2016.1 specific setups
@@ -150,7 +151,14 @@ proc rvtb_default_build {stem step} {
set_msg_config -suppress -id {DRC 23-20}; # DSP48 output pilelining
set_msg_config -suppress -id {Project 1-120}; # WebTalk mandatory
set_msg_config -suppress -id {Common 17-186}; # WebTalk info send
# set message default limit to 200 (buildin default is 100)
set_param messaging.defaultLimit 200
# set message limit to 5000 for some cases
# Synth 8-3331 : design xxx has unconnected port yyy
# Synth 8-3332 : Sequential element xxx is unused .. removed from yyy
set_msg_config -id {[Synth 8-3331]} -limit 5000
set_msg_config -id {[Synth 8-3332]} -limit 5000
# Setup list of extra synthesis options (for later rodinMoreOptions)
set synth_more_opts {}