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tbench support for DEUNA

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This commit is contained in:
Walter F.J. Mueller
2017-04-17 21:29:36 +02:00
parent b115cba926
commit 8238d3930b
6 changed files with 423 additions and 1 deletions
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32
tools/asm-11/lib/defs_xu.mac Normal file
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; $Id: defs_xu.mac 848 2017-02-04 14:55:30Z mueller $
; Copyright 2017- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
; License disclaimer see License.txt in $RETROBASE directory
;
; definitions for DEUNA controler
;
; register addresses
;
xu.pr0=174510
xu.pr1=174512
xu.pr2=174514
xu.pr3=174516
;
; symbol definitions for xu.pr0
;
xu.ser=100000
xu.pce=040000
xu.rxi=020000
xu.txi=010000
xu.dni=004000
xu.rcb=002000
xu.usc=000400
xu.ir =000200
xu.ie =000100
xu.rst=000040
;
; symbol definitions for xu.pr1
;
xu.xpw=100000
xu.ica=040000
xu.pct=000200
xu.deu=000020

7
tools/tbench/deuna/deuna_all.dat Normal file
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# $Id: deuna_all.dat 848 2017-02-04 14:55:30Z mueller $
#
## steering file for all deuna tests
#
test_deuna_regs.tcl
test_deuna_func.tcl
test_deuna_int.tcl

131
tools/tbench/deuna/test_deuna_func.tcl Normal file
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# $Id: test_deuna_func.tcl 874 2017-04-14 17:53:07Z mueller $
#
# Copyright 2017- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
# License disclaimer see License.txt in $RETROBASE directory
#
# Revision History:
# Date Rev Version Comment
# 2017-04-14 874 1.0 Initial version
# 2017-01-30 848 0.1 First draft
#
# Test function response
# ----------------------------------------------------------------------------
rlc log "test_deuna_func: test function response -----------------------------"
package require ibd_deuna
if {![ibd_deuna::setup]} {
rlc log " test_deuna_regs-W: device not found, test aborted"
return
}
rlc set statmask $rw11::STAT_DEFMASK
rlc set statvalue 0
# discard pending attn to be on save side
rlc wtlam 0.
rlc exec -attn
set attnmsk [expr {1<<$ibd_deuna::ANUM}]
# -- Section A ---------------------------------------------------------------
rlc log " A1: test PR0:PCMD -----------------------------------------"
rlc log " A1.1: set PR1 state to READY -----------------------"
$cpu cp -wibr xua.pr1 [regbld ibd_deuna::PR1 {state "READY"}]
rlc log " A1.2: check NOOP doesn't LAM -----------------------"
# cleanup pr0 loc and rem
$cpu cp \
-wma xua.pr0 0xff00 \
-rma xua.pr0 -edata 0 \
-wibr xua.pr0 [regbld ibd_deuna::PR0RW busy rset brst] \
-ribr xua.pr0 -edata 0
rlc wtlam 0.
rlc exec -attn -edata 0
rlc log " A1.3: check PCMD>0 gives LAM ----------------------"
# 0001:GETPCB; 0010:GETCMD; 1000:PDMD; 1111:STOP
foreach pcmd {0x01 0x02 0x08 0x0f} {
set pr0 [regbldkv ibd_deuna::PR0 pcmd $pcmd]
# loc write and read pr0; also check rem pr0
$cpu cp \
-wma xua.pr0 $pcmd \
-rma xua.pr0 -edata $pcmd \
-ribr xua.pr0 -edata [regbldkv ibd_deuna::PR0RR \
pcmdbp $pcmd busy 1 pcmd $pcmd]
rlc wtlam 1.
rlc exec -attn -edata $attnmsk
# simulate command handling in backend and driver response
# rem: PR0 write dni
# loc: PR0 expect dni,intr
# loc: PR0 write dni (to clear), also set pcmd=0
# loc: PR0 expect dni cleared (in fact pr0 = 0)
$cpu cp \
-wibr xua.pr0 [regbld ibd_deuna::PR0RW dni] \
-rma xua.pr0 -edata [regbldkv ibd_deuna::PR0 dni 1 intr 1 pcmd $pcmd] \
-wma xua.pr0 [regbldkv ibd_deuna::PR0 dni 1] \
-rma xua.pr0 -edata 0
}
rlc log " A1.4: check pcmd busy protect logic----------------"
# pr0 is clean from previous test !
$cpu cp \
-wma xua.pr0 [regbld ibd_deuna::PR0 {pcmd "GETCMD"}] \
-rma xua.pr0 -edata [regbld ibd_deuna::PR0 {pcmd "GETCMD"}] \
-wma xua.pr0 [regbld ibd_deuna::PR0 {pcmd "PDMD"}] \
-rma xua.pr0 -edata [regbld ibd_deuna::PR0 {pcmd "PDMD"}]
rlc wtlam 1.
rlc exec -attn -edata $attnmsk
# simulate command handling in backend
# pcmd and pcmdbp differ now
# pcwwb is cleared by rem pr0 read (check by reading twice)
$cpu cp \
-ribr xua.pr0 -edata [regbldkv ibd_deuna::PR0RR \
pcmdbp "GETCMD" busy 1 pcwwb 1 pcmd "PDMD"] \
-ribr xua.pr0 -edata [regbldkv ibd_deuna::PR0RR \
pcmdbp "GETCMD" busy 1 pcmd "PDMD"] \
-wibr xua.pr0 [regbld ibd_deuna::PR0RW dni] \
-rma xua.pr0 -edata [regbldkv ibd_deuna::PR0 dni 1 intr 1 pcmd "PDMD"] \
-wma xua.pr0 [regbldkv ibd_deuna::PR0 dni 1] \
-rma xua.pr0 -edata 0
rlc log " A2: test PR0:RSET -----------------------------------------"
# pr0 is clean from previous test !
$cpu cp \
-wma xua.pr0 [regbld ibd_deuna::PR0 rset] \
-rma xua.pr0 -edata 0 \
-rma xua.pr1 -edata [regbld ibd_deuna::PR1 {state "RESET"}]
rlc wtlam 1.
rlc exec -attn -edata $attnmsk
# simulate command handling in backend
$cpu cp \
-ribr xua.pr0 -edata [regbld ibd_deuna::PR0RR busy rset] \
-wibr xua.pr0 [regbld ibd_deuna::PR0RW rset] \
-ribr xua.pr0 -edata 0
rlc log " A3: test BRESET ------------------------------------------"
# pr0 is clean from previous test !
# But PR1 state must be set to READY again
$cpu cp \
-wibr xua.pr1 [regbld ibd_deuna::PR1 {state "READY"}] \
-breset \
-rma xua.pr0 -edata 0 \
-rma xua.pr1 -edata [regbld ibd_deuna::PR1 {state "RESET"}]
rlc wtlam 1.
rlc exec -attn -edata $attnmsk
# simulate command handling in backend
$cpu cp \
-ribr xua.pr0 -edata [regbld ibd_deuna::PR0RR busy brst] \
-wibr xua.pr0 [regbld ibd_deuna::PR0RW brst] \
-ribr xua.pr0 -edata 0

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tools/tbench/deuna/test_deuna_int.tcl Normal file
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# $Id: test_deuna_int.tcl 874 2017-04-14 17:53:07Z mueller $
#
# Copyright 2017- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
# License disclaimer see License.txt in $RETROBASE directory
#
# Revision History:
# Date Rev Version Comment
# 2017-04-14 874 1.0 Initial version
# 2017-02-03 848 0.1 First draft
#
# Test interrupt response
# ----------------------------------------------------------------------------
rlc log "test_deuna_int: test interrupt response -----------------------------"
package require ibd_deuna
if {![ibd_deuna::setup]} {
rlc log " test_deuna_regs-W: device not found, test aborted"
return
}
rlc set statmask $rw11::STAT_DEFMASK
rlc set statvalue 0
# load test code
$cpu ldasm -lst lst -sym sym {
.include |lib/defs_cpu.mac|
.include |lib/defs_xu.mac|
;
.include |lib/vec_cpucatch.mac|
;
. = 000120 ; setup DEUNA interrupt vector catcher
v..xu: .word vh.xu
.word cp.pr7
;
. = 1000 ; data area
stack:
;
start: ; started with pr7, interrupts locked out
clr r2
clr r3
clr r4
spl 0 ; allow interrupts
nop ; will be executed (11/70...)
nop ; interrupt here
nop ; to be sure ...
nop
halt
; DEUNA interrupt handler
; r0 in: pr0 clear mask after 1st interrupt
; r1 in: pr0 clear mask after 2nd interrupt
; r2 out: pr0 after 1st interrupt
; r3 out: pr0 after 2nd interrupt
; r4 out: interrupt count
;
vh.xu: tst r4 ; 1st or 2nd interrupt ?
bne 100$
; handle 1st interrupt
inc r4 ; count interrupts
mov @#xu.pr0,r2 ; get state
mov r0,r5
swab r5
movb r5,@#xu.pr0+1 ; clear interrupt
rti ; and return
100$: ; handle 2nd interrupt
cmp r4,#2 ; check for unexpected re-interrupt
bge 200$
inc r4 ; count interrupts
mov @#xu.pr0,r3 ; get state
mov r1,r5
swab r5
movb r5,@#xu.pr0+1 ; clear interrupt
rti ; and return
200$: ; unexpected re-interrupt
halt
}
##puts $lst
# define tmpproc for doing checks
proc tmpproc_dotest {cpu symName args} {
upvar 1 $symName sym
args2opts opts {i.pr0 0 \
i.r0 0 \
i.r1 0 \
o.r2 0 \
o.r3 0 \
o.r4 0 } {*}$args
$cpu cp -wibr xua.pr0 $opts(i.pr0)
rw11::asmrun $cpu sym r0 $opts(i.r0) \
r1 $opts(i.r1) \
ps [regbld rw11::PSW {pri 7}]
rw11::asmwait $cpu sym
rw11::asmtreg $cpu r2 $opts(o.r2) \
r3 $opts(o.r3) \
r4 $opts(o.r4) \
sp $sym(stack)
return ""
}
# -- Section A ---------------------------------------------------------------
rlc log " A1: enable interrupt --------------------------------------"
# Note: changing inte sets DNI !
$cpu cp -wma xua.pr0 [regbld ibd_deuna::PR0 inte] \
-rma xua.pr0 -edata [regbld ibd_deuna::PR0 dni intr inte] \
-wma xua.pr0 [regbld ibd_deuna::PR0 dni inte] \
-rma xua.pr0 -edata [regbld ibd_deuna::PR0 inte]
# -- Section B ---------------------------------------------------------------
rlc log " B1: test RXI interrupt ------------------------------------"
tmpproc_dotest $cpu sym i.pr0 [regbld ibd_deuna::PR0RW rxi] \
i.r0 [regbld ibd_deuna::PR0 rxi] \
o.r2 [regbld ibd_deuna::PR0 rxi intr inte] \
o.r4 1
rlc log " B2: test TXI interrupt ------------------------------------"
tmpproc_dotest $cpu sym i.pr0 [regbld ibd_deuna::PR0RW txi] \
i.r0 [regbld ibd_deuna::PR0 txi] \
o.r2 [regbld ibd_deuna::PR0 txi intr inte] \
o.r4 1
rlc log " B3: test RXI+TXI interrupt --------------------------------"
tmpproc_dotest $cpu sym i.pr0 [regbld ibd_deuna::PR0RW rxi txi] \
i.r0 [regbld ibd_deuna::PR0 rxi] \
i.r1 [regbld ibd_deuna::PR0 txi] \
o.r2 [regbld ibd_deuna::PR0 rxi txi intr inte] \
o.r3 [regbld ibd_deuna::PR0 txi intr inte] \
o.r4 2

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tools/tbench/deuna/test_deuna_regs.tcl Normal file
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# $Id: test_deuna_regs.tcl 874 2017-04-14 17:53:07Z mueller $
#
# Copyright 2017- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
# License disclaimer see License.txt in $RETROBASE directory
#
# Revision History:
# Date Rev Version Comment
# 2017-04-14 874 1.0 Initial version
# 2017-01-30 848 0.1 First draft
#
# Test register response
# A: register basics
# ----------------------------------------------------------------------------
rlc log "test_deuna_regs: test register response -----------------------------"
package require ibd_deuna
if {![ibd_deuna::setup]} {
rlc log " test_deuna_regs-W: device not found, test aborted"
return
}
rlc set statmask $rw11::STAT_DEFMASK
rlc set statvalue 0
# -- Section A ---------------------------------------------------------------
rlc log " A1: test read ---------------------------------------------"
rlc log " A1.1: loc read pr0,...,pr3 -------------------------"
$cpu cp -rma xua.pr0 \
-rma xua.pr1 \
-rma xua.pr2 \
-rma xua.pr3
rlc log " A1.2: rem read pr0,...,pr3 -------------------------"
$cpu cp -ribr xua.pr0 \
-ribr xua.pr1 \
-ribr xua.pr2 \
-ribr xua.pr3
rlc log " A2: test pr2+3 (pcbb) --------------------------------"
rlc log " A2.1: loc write pcbb, read loc and rem -------------"
$cpu cp -wma xua.pr2 0xffff \
-wma xua.pr3 0xffff \
-rma xua.pr2 -edata 0xfffe \
-rma xua.pr3 -edata 0x0003 \
-ribr xua.pr2 -edata 0xfffe \
-ribr xua.pr3 -edata 0x0003
$cpu cp -wma xua.pr2 0x1234 \
-wma xua.pr3 0x0001 \
-rma xua.pr2 -edata 0x1234 \
-rma xua.pr3 -edata 0x0001 \
-ribr xua.pr2 -edata 0x1234 \
-ribr xua.pr3 -edata 0x0001
rlc log " A3: test pr0 -----------------------------------------"
rlc log " A3.1: loc clear or all interrupt bits --------------"
$cpu cp -wma xua.pr0 0xff00 \
-rma xua.pr0 -edata 0
rlc log " A3.2: rem set and loc clear of interrupt bits ------"
$cpu cp -wibr xua.pr0 [regbld ibd_deuna::PR0RW seri] \
-rma xua.pr0 -edata [regbld ibd_deuna::PR0 seri intr] \
-wibr xua.pr0 [regbld ibd_deuna::PR0RW pcei] \
-rma xua.pr0 -edata [regbld ibd_deuna::PR0 seri pcei intr] \
-wibr xua.pr0 [regbld ibd_deuna::PR0RW rxi] \
-rma xua.pr0 -edata [regbld ibd_deuna::PR0 seri pcei rxi intr] \
-wibr xua.pr0 [regbld ibd_deuna::PR0RW txi] \
-rma xua.pr0 -edata [regbld ibd_deuna::PR0 seri pcei rxi txi intr]
$cpu cp -wma xua.pr0 [regbld ibd_deuna::PR0 seri] \
-rma xua.pr0 -edata [regbld ibd_deuna::PR0 pcei rxi txi intr] \
-wma xua.pr0 [regbld ibd_deuna::PR0 pcei] \
-rma xua.pr0 -edata [regbld ibd_deuna::PR0 rxi txi intr] \
-wma xua.pr0 [regbld ibd_deuna::PR0 rxi] \
-rma xua.pr0 -edata [regbld ibd_deuna::PR0 txi intr] \
-wma xua.pr0 [regbld ibd_deuna::PR0 txi] \
-rma xua.pr0 -edata 0
$cpu cp -wibr xua.pr0 [regbld ibd_deuna::PR0RW dni] \
-rma xua.pr0 -edata [regbld ibd_deuna::PR0 dni intr] \
-wibr xua.pr0 [regbld ibd_deuna::PR0RW rcbi] \
-rma xua.pr0 -edata [regbld ibd_deuna::PR0 dni rcbi intr] \
-wibr xua.pr0 [regbld ibd_deuna::PR0RW usci] \
-rma xua.pr0 -edata [regbld ibd_deuna::PR0 dni rcbi usci intr]
$cpu cp -wma xua.pr0 [regbld ibd_deuna::PR0 dni] \
-rma xua.pr0 -edata [regbld ibd_deuna::PR0 rcbi usci intr] \
-wma xua.pr0 [regbld ibd_deuna::PR0 rcbi] \
-rma xua.pr0 -edata [regbld ibd_deuna::PR0 usci intr] \
-wma xua.pr0 [regbld ibd_deuna::PR0 usci] \
-rma xua.pr0 -edata 0
rlc log " A4: test pr1 -----------------------------------------"
rlc log " A4.1: XPWR,ICAB,PCTO,DEUNA rem write, loc read -----"
$cpu cp -wibr xua.pr1 0 \
-rma xua.pr1 -edata 0 \
-wibr xua.pr1 [regbld ibd_deuna::PR1 xpwr] \
-rma xua.pr1 -edata [regbld ibd_deuna::PR1 xpwr] \
-wibr xua.pr1 [regbld ibd_deuna::PR1 icab] \
-rma xua.pr1 -edata [regbld ibd_deuna::PR1 icab] \
-wibr xua.pr1 [regbld ibd_deuna::PR1 pcto] \
-rma xua.pr1 -edata [regbld ibd_deuna::PR1 pcto] \
-wibr xua.pr1 [regbld ibd_deuna::PR1 deuna] \
-rma xua.pr1 -edata [regbld ibd_deuna::PR1 deuna]
rlc log " A4.2: STATE rem write, loc read -----"
$cpu cp -wibr xua.pr1 [regbld ibd_deuna::PR1 {state 001}] \
-rma xua.pr1 -edata [regbld ibd_deuna::PR1 {state 001}] \
-wibr xua.pr1 [regbld ibd_deuna::PR1 {state 017}] \
-rma xua.pr1 -edata [regbld ibd_deuna::PR1 {state 017}] \
-wibr xua.pr1 0 \
-rma xua.pr1 -edata 0

3
tools/tbench/dev_all.dat
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# $Id: dev_all.dat 687 2015-06-05 09:03:34Z mueller $
# $Id: dev_all.dat 848 2017-02-04 14:55:30Z mueller $
#
## steering file for all devices tests
#
@rhrp/rhrp_all.dat
@tm11/tm11_all.dat
@deuna/deuna_all.dat
#