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add tcode cpu_eis.mac; end usage of test_w11a_div.tcl

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- tbench/w11a/test_w11a_div.tcl: add div_show_exp for export of test cases
- tbench/w11a/w11a_all.dat: drop test_w11a_div.tcl
- tcode/cpu_all.dat: add cpu_eis.mac
- tcode/cpu_eis.mac: added
This commit is contained in:
wfjm 2022-07-11 10:15:13 +02:00
parent f2ced63b0d
commit aff6fe2c6d
4 changed files with 314 additions and 7 deletions
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22
tools/tbench/w11a/test_w11a_div.tcl
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@ -1,9 +1,10 @@
# $Id: test_w11a_div.tcl 1178 2019-06-30 12:39:40Z mueller $
# $Id: test_w11a_div.tcl 1250 2022-07-10 10:21:03Z mueller $
# SPDX-License-Identifier: GPL-3.0-or-later
# Copyright 2014- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
# Copyright 2014-2022 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
#
# Revision History:
# Date Rev Version Comment
# 2022-07-09 1250 1.0.3 add div_show_exp for export of test cases
# 2014-07-27 575 1.0.2 drop tout value from asmwait, reply on asmwait_tout
# 2014-07-20 570 1.0.2 add rw11::div_show_test; test late div quit cases
# 2014-07-12 569 1.0.1 move sxt16/32 to rutil
@ -71,7 +72,7 @@ namespace eval rw11 {
}
#
# div_testd3: test division ddh,ddl,,dr + expected result ------------------
# div_testd3: test division ddh,ddl,dr + expected result -------------------
#
proc div_testd3 {cpu symName ddh ddl dr q r n z v c} {
upvar 1 $symName sym
@ -90,6 +91,21 @@ namespace eval rw11 {
puts [format "%06o %06o %06o : %d%d%d%d %06o %06o # %11d/%6d:%6d,%6d" \
$ddh $ddl $dr16 $n $z $v $c $q16 $r16 $ddi $dri $qi $ri ]
}
# use rw11::div_show_exp to export test cases
if {[info exists rw11::div_show_exp] && $rw11::div_show_exp} {
set ddi [expr (($ddh&0xffff)<<16) + ($ddl&0xffff)]
set ddi [rutil::sxt32 $ddi]
set dri [rutil::sxt16 $dr16]
set qi [rutil::sxt16 $q16]
set ri [rutil::sxt16 $r16]
set psw "cp"
append psw [expr {$n ? "n" : "0"}]
append psw [expr {$z ? "z" : "0"}]
append psw [expr {$v ? "v" : "0"}]
append psw [expr {$c ? "c" : "0"}]
puts [format " .word %07o,%07o,%7d., %s,%7d.,%7d.;dd=%11d" \
$ddh $ddl $dri $psw $qi $ri $ddi]
}
rw11::asmrun $cpu sym r0 $ddh r1 $ddl r2 $dr16
rw11::asmwait $cpu sym

4
tools/tbench/w11a/w11a_all.dat
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@ -1,4 +1,4 @@
# $Id: w11a_all.dat 1113 2019-02-23 11:32:27Z mueller $
# $Id: w11a_all.dat 1250 2022-07-10 10:21:03Z mueller $
#
## steering file for all w11a tests
#
@ -14,5 +14,3 @@ test_w11a_inst_traps.tcl
#
test_w11a_cpuerr.tcl
#
test_w11a_div.tcl
#

3
tools/tcode/cpu_all.dat
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@ -1,5 +1,6 @@
# $Id: cpu_all.dat 1249 2022-07-08 06:27:59Z mueller $
# $Id: cpu_all.dat 1250 2022-07-10 10:21:03Z mueller $
#
## steering file for all cpu tests
#
cpu_basics.mac
cpu_eis.mac

292
tools/tcode/cpu_eis.mac Normal file
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@ -0,0 +1,292 @@
; $Id: cpu_eis.mac 1251 2022-07-11 06:31:00Z mueller $
; SPDX-License-Identifier: GPL-3.0-or-later
; Copyright 2022- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
;
; Revision History:
; Date Rev Version Comment
; 2022-07-09 1450 1.0 Initial version
;
; Test CPU EIS instructions
;
.include |lib/tcode_std_base.mac|
;
; Section A: div =============================================================
;
jmp ta0101
;
; driver for div tests
;
topdiv: mov (r5),r4 ; setup data pointer
mov 2(r5),r5 ; setup end pointer
mov #cp.psw,r3 ; setup psw pointer
;
100$: mov (r4)+,r0 ; load divident high
mov (r4)+,r1 ; load divident low
div (r4)+,r0 ; divide by divisor
mov (r3),r2 ; get psw
cmp (r4)+,r2 ; check psw
beq .+4
halt
bit #cp00vc, r2 ; V or C set ?
beq 200$ ; eq if V=0 and C=0
add #4,r4 ; skip q and r check
br 300$
;
200$: cmp (r4)+,r0 ; check quotient
beq .+4
halt
cmp (r4)+,r1 ; check reminder
beq .+4
halt
;
300$: cmp r4,r5 ; more to do ?
blo 100$
rts pc
;
; Test A1.1 -- div test basics ++++++++++++++++++++++++++++++++++++++++++++++++
; from test_w11a_div.tcl, div_testd2 cases, translated 1-to-1
;
ta0101: mov #1000$,r5
jsr pc,topdiv
jmp 9999$
;
1000$: .word 1010$
.word 1011$
;
;
; ddh ddl dr psw q r
1010$:
; --- dr>0
.word 0, 0, 3, cp0z00, 0, 0
.word 0, 1, 3, cp0z00, 0, 1
.word 0, 2, 3, cp0z00, 0, 2
.word 0, 3, 3, cp0000, 1, 0
.word 0, 4, 3, cp0000, 1, 1
.word -1, -1, 3, cp0z00, 0, -1
.word -1, -2, 3, cp0z00, 0, -2
.word -1, -3, 3, cpn000, -1, 0
.word -1, -4, 3, cpn000, -1, -1
; --- dr<0
.word 0, 0, -3, cp0z00, 0, 0
.word 0, 1, -3, cp0z00, 0, 1
.word 0, 2, -3, cp0z00, 0, 2
.word 0, 3, -3, cpn000, -1, 0
.word 0, 4, -3, cpn000, -1, 1
.word -1, -1, -3, cp0z00, 0, -1
.word -1, -2, -3, cp0z00, 0, -2
.word -1, -3, -3, cp0000, 1, 0
.word -1, -4, -3, cp0000, 1, -1
; --- dr==0
.word 0, 0, 0, cp0zvc, 0, 0 ; !vc
.word 0, 1, 0, cp0zvc, 0, 0 ; !vc
.word -1, -1, 0, cp0zvc, 0, 0 ; !vc
; --- 4 quadrant basics
.word 0, 34., 5., cp0000, 6., 4.
.word 0, 34., -5., cpn000, -6., 4.
.word -1, -34., 5., cpn000, -6., -4.
.word -1, -34., -5., cp0000, 6., -4.
; --- late div quite cases in 2 quadrant algorithm
.word -1,-32767., -1., cp0000, 32767., 0. ;-32767/-1
.word -1, 100000, -1., cp00v0, 0, 0 ;-32768/-1 !v
.word -1, 077777, -1., cp00v0, 0, 0 ;-32769/-1 !v
;
.word -1, 000002, -2., cp0000, 32767., 0. ;-65534/-2
.word -1, 000001, -2., cp0000, 32767., -1. ;-65535/-2
.word -1, 000000, -2., cp00v0, 0, 0 ;-65536/-2 !v
.word -2, 177777, -2., cp00v0, 0, 0 ;-65537/-2 !v
; --- big divident overflow cases
.word 77777, 177777, 1., cp00v0, 0, 0 ;0x7fffffff/ 1 !v
.word 77777, 177777, 2., cp00v0, 0, 0 ;0x7fffffff/ 2 !v
.word 77777, 177777, -1., cpn0v0, 0, 0 ;0x7fffffff/-1 !v
.word 77777, 177777, -2., cpn0v0, 0, 0 ;0x7fffffff/-2 !v
.word 100000, 000000, 1., cpn0v0, 0, 0 ;0x80000000/ 1 !v
.word 100000, 000000, 2., cpn0v0, 0, 0 ;0x80000000/ 2 !v
.word 100000, 000000, -1., cp00v0, 0, 0 ;0x80000000/-1 !v
.word 100000, 000000, -2., cp00v0, 0, 0 ;0x80000000/-2 !v
;
1011$:
9999$: iot ; end of test A1.1
;
; Test A1.2 -- div test systematic ++++++++++++++++++++++++++++++++++++++++++++
; from test_w11a_div.tcl, div_testdqr cases, exported via div_show_exp
;
ta0102: mov #1000$,r5
jsr pc,topdiv
jmp 9999$
;
1000$: .word 1010$
.word 1011$
;
;
; ddh ddl dr psw q r
1010$:
; test q=100000 boundary cases (q = max neg value)
; case dd>0, dr<0 -- factor 21846
.word 0025253,0000000, -21846., cpn000, -32768., 0.;dd= 715849728
.word 0025253,0000001, -21846., cpn000, -32768., 1.;dd= 715849729
.word 0025253,0052524, -21846., cpn000, -32768., 21844.;dd= 715871572
.word 0025253,0052525, -21846., cpn000, -32768., 21845.;dd= 715871573
.word 0025253,0052526, -21846., cpn0v0, 10923., 21846.;dd= 715871574
.word 0025253,0052527, -21846., cpn0v0, 10923., 21847.;dd= 715871575
; case dd<0, dr>0 -- factor 21846
.word 0152525,0000000, 21846., cpn000, -32768., 0.;dd= -715849728
.word 0152524,0177777, 21846., cpn000, -32768., -1.;dd= -715849729
.word 0152524,0125254, 21846., cpn000, -32768., -21844.;dd= -715871572
.word 0152524,0125253, 21846., cpn000, -32768., -21845.;dd= -715871573
.word 0152524,0125252, 21846., cpn0v0, -10924., -21846.;dd= -715871574
.word 0152524,0125251, 21846., cpn0v0, -10924., -21847.;dd= -715871575
; case dd>0, dr<0 -- factor 21847
.word 0025253,0100000, -21847., cpn000, -32768., 0.;dd= 715882496
.word 0025253,0100001, -21847., cpn000, -32768., 1.;dd= 715882497
.word 0025253,0152525, -21847., cpn000, -32768., 21845.;dd= 715904341
.word 0025253,0152526, -21847., cpn000, -32768., 21846.;dd= 715904342
.word 0025253,0152527, -21847., cpn0v0, 10923., -10921.;dd= 715904343
.word 0025253,0152530, -21847., cpn0v0, 10923., -10920.;dd= 715904344
; case dd<0, dr>0 -- factor 21847
.word 0152524,0100000, 21847., cpn000, -32768., 0.;dd= -715882496
.word 0152524,0077777, 21847., cpn000, -32768., -1.;dd= -715882497
.word 0152524,0025253, 21847., cpn000, -32768., -21845.;dd= -715904341
.word 0152524,0025252, 21847., cpn000, -32768., -21846.;dd= -715904342
.word 0152524,0025251, 21847., cpn0v0, -10924., 10921.;dd= -715904343
.word 0152524,0025250, 21847., cpn0v0, -10924., 10920.;dd= -715904344
; test q=077777 boundary cases (q = max pos value)
; case dd>0, dr>0 -- factor 21846
.word 0025252,0125252, 21846., cp0000, 32767., 0.;dd= 715827882
.word 0025252,0125253, 21846., cp0000, 32767., 1.;dd= 715827883
.word 0025252,0177776, 21846., cp0000, 32767., 21844.;dd= 715849726
.word 0025252,0177777, 21846., cp0000, 32767., 21845.;dd= 715849727
.word 0025253,0000000, 21846., cp00v0, 10923., 0.;dd= 715849728
.word 0025253,0000001, 21846., cp00v0, 10923., 1.;dd= 715849729
; case dd<0, dr<0 -- factor 21846
.word 0152525,0052526, -21846., cp0000, 32767., 0.;dd= -715827882
.word 0152525,0052525, -21846., cp0000, 32767., -1.;dd= -715827883
.word 0152525,0000002, -21846., cp0000, 32767., -21844.;dd= -715849726
.word 0152525,0000001, -21846., cp0000, 32767., -21845.;dd= -715849727
.word 0152525,0000000, -21846., cp00v0, -10923., 0.;dd= -715849728
.word 0152524,0177777, -21846., cp00v0, -10924., -1.;dd= -715849729
; case dd>0, dr>0 -- factor 21847
.word 0025253,0025251, 21847., cp0000, 32767., 0.;dd= 715860649
.word 0025253,0025252, 21847., cp0000, 32767., 1.;dd= 715860650
.word 0025253,0077776, 21847., cp0000, 32767., 21845.;dd= 715882494
.word 0025253,0077777, 21847., cp0000, 32767., 21846.;dd= 715882495
.word 0025253,0100000, 21847., cp00v0, 10923., -32768.;dd= 715882496
.word 0025253,0100001, 21847., cp00v0, 10923., -32767.;dd= 715882497
; case dd<0, dr<0 -- factor 21847
.word 0152524,0152527, -21847., cp0000, 32767., 0.;dd= -715860649
.word 0152524,0152526, -21847., cp0000, 32767., -1.;dd= -715860650
.word 0152524,0100002, -21847., cp0000, 32767., -21845.;dd= -715882494
.word 0152524,0100001, -21847., cp0000, 32767., -21846.;dd= -715882495
.word 0152524,0100001, -21847., cp0000, 32767., -21846.;dd= -715882495
.word 0152524,0100000, -21847., cp00v0, -10924., -32768.;dd= -715882496
; test dr=100000 boundary cases (dr = max neg value)
; case dd<0, q>0
.word 0177777,0100000, -32768., cp0000, 1., 0.;dd= -32768
.word 0177777,0077777, -32768., cp0000, 1., -1.;dd= -32769
.word 0177777,0000001, -32768., cp0000, 1., -32767.;dd= -65535
.word 0177777,0000000, -32768., cp0000, 2., 0.;dd= -65536
.word 0177776,0177777, -32768., cp0000, 2., -1.;dd= -65537
.word 0177776,0100001, -32768., cp0000, 2., -32767.;dd= -98303
.word 0177776,0100000, -32768., cp0000, 3., 0.;dd= -98304
.word 0177776,0077777, -32768., cp0000, 3., -1.;dd= -98305
.word 0177776,0000001, -32768., cp0000, 3., -32767.;dd= -131071
.word 0177776,0000000, -32768., cp0000, 4., 0.;dd= -131072
.word 0177775,0177777, -32768., cp0000, 4., -1.;dd= -131073
.word 0177775,0100001, -32768., cp0000, 4., -32767.;dd= -163839
.word 0177775,0000000, -32768., cp0000, 6., 0.;dd= -196608
.word 0140003,0000000, -32768., cp0000, 32762., 0.;dd=-1073545216
.word 0140002,0000000, -32768., cp0000, 32764., 0.;dd=-1073610752
.word 0140001,0100000, -32768., cp0000, 32765., 0.;dd=-1073643520
.word 0140001,0000000, -32768., cp0000, 32766., 0.;dd=-1073676288
.word 0140000,0177777, -32768., cp0000, 32766., -1.;dd=-1073676289
.word 0140000,0100001, -32768., cp0000, 32766., -32767.;dd=-1073709055
.word 0140000,0100000, -32768., cp0000, 32767., 0.;dd=-1073709056
.word 0140000,0077777, -32768., cp0000, 32767., -1.;dd=-1073709057
.word 0140000,0000001, -32768., cp0000, 32767., -32767.;dd=-1073741823
; case dd>0, q<0
.word 0000000,0100000, -32768., cpn000, -1., 0.;dd= 32768
.word 0000000,0100001, -32768., cpn000, -1., 1.;dd= 32769
.word 0000000,0177777, -32768., cpn000, -1., 32767.;dd= 65535
.word 0000001,0000000, -32768., cpn000, -2., 0.;dd= 65536
.word 0000001,0000001, -32768., cpn000, -2., 1.;dd= 65537
.word 0000001,0077777, -32768., cpn000, -2., 32767.;dd= 98303
.word 0037777,0100000, -32768., cpn000, -32767., 0.;dd= 1073709056
.word 0037777,0100001, -32768., cpn000, -32767., 1.;dd= 1073709057
.word 0037777,0177777, -32768., cpn000, -32767., 32767.;dd= 1073741823
.word 0040000,0000000, -32768., cpn000, -32768., 0.;dd= 1073741824
.word 0040000,0000001, -32768., cpn000, -32768., 1.;dd= 1073741825
.word 0040000,0077777, -32768., cpn000, -32768., 32767.;dd= 1073774591
; test dr=077777 boundary cases (dr = max pos value)
; case dd>0, q>0
.word 0000000,0077777, 32767., cp0000, 1., 0.;dd= 32767
.word 0000000,0100000, 32767., cp0000, 1., 1.;dd= 32768
.word 0000000,0177775, 32767., cp0000, 1., 32766.;dd= 65533
.word 0000000,0177776, 32767., cp0000, 2., 0.;dd= 65534
.word 0000000,0177777, 32767., cp0000, 2., 1.;dd= 65535
.word 0000001,0077774, 32767., cp0000, 2., 32766.;dd= 98300
.word 0037776,0100002, 32767., cp0000, 32766., 0.;dd= 1073643522
.word 0037776,0100003, 32767., cp0000, 32766., 1.;dd= 1073643523
.word 0037777,0000000, 32767., cp0000, 32766., 32766.;dd= 1073676288
.word 0037777,0000001, 32767., cp0000, 32767., 0.;dd= 1073676289
.word 0037777,0000002, 32767., cp0000, 32767., 1.;dd= 1073676290
.word 0037777,0077777, 32767., cp0000, 32767., 32766.;dd= 1073709055
; case dd<0, q<0
.word 0177777,0100001, 32767., cpn000, -1., 0.;dd= -32767
.word 0177777,0100000, 32767., cpn000, -1., -1.;dd= -32768
.word 0177777,0000003, 32767., cpn000, -1., -32766.;dd= -65533
.word 0177777,0000002, 32767., cpn000, -2., 0.;dd= -65534
.word 0177777,0000001, 32767., cpn000, -2., -1.;dd= -65535
.word 0177776,0100004, 32767., cpn000, -2., -32766.;dd= -98300
.word 0140000,0177777, 32767., cpn000, -32767., 0.;dd=-1073676289
.word 0140000,0177776, 32767., cpn000, -32767., -1.;dd=-1073676290
.word 0140000,0100001, 32767., cpn000, -32767., -32766.;dd=-1073709055
.word 0140000,0100000, 32767., cpn000, -32768., 0.;dd=-1073709056
.word 0140000,0077777, 32767., cpn000, -32768., -1.;dd=-1073709057
.word 0140000,0000002, 32767., cpn000, -32768., -32766.;dd=-1073741822
; test dd max cases
; case dd>0 dr<0 near nmax*nmax+nmax-1 = +1073774591
.word 0037777,0177777, -32768., cpn000, -32767., 32767.;dd= 1073741823
.word 0040000,0000000, -32768., cpn000, -32768., 0.;dd= 1073741824
.word 0040000,0000001, -32768., cpn000, -32768., 1.;dd= 1073741825
.word 0040000,0077776, -32768., cpn000, -32768., 32766.;dd= 1073774590
.word 0040000,0077777, -32768., cpn000, -32768., 32767.;dd= 1073774591
.word 0037777,0100000, -32768., cpn000, -32767., 0.;dd= 1073709056
.word 0037777,0100001, -32768., cpn000, -32767., 1.;dd= 1073709057
; case dd>0 dr>0 near pmax*pmax+pmax-1 = +1073709055
.word 0037777,0000000, 32767., cp0000, 32766., 32766.;dd= 1073676288
.word 0037777,0000001, 32767., cp0000, 32767., 0.;dd= 1073676289
.word 0037777,0000002, 32767., cp0000, 32767., 1.;dd= 1073676290
.word 0037777,0077776, 32767., cp0000, 32767., 32765.;dd= 1073709054
.word 0037777,0077777, 32767., cp0000, 32767., 32766.;dd= 1073709055
.word 0037777,0100000, 32767., cp00v0, 16383., -32768.;dd= 1073709056
.word 0037776,0100001, 32767., cp0000, 32765., 32766.;dd= 1073643521
; case dd<0 dr>0 near nmax*pmax+pmax-1 = -1073741822
.word 0140000,0100001, 32767., cpn000, -32767., -32766.;dd=-1073709055
.word 0140000,0100000, 32767., cpn000, -32768., 0.;dd=-1073709056
.word 0140000,0077777, 32767., cpn000, -32768., -1.;dd=-1073709057
.word 0140000,0000003, 32767., cpn000, -32768., -32765.;dd=-1073741821
.word 0140000,0000002, 32767., cpn000, -32768., -32766.;dd=-1073741822
.word 0140000,0000001, 32767., cpn0v0, -16384., 1.;dd=-1073741823
.word 0140000,0000000, 32767., cpn0v0, -16384., 0.;dd=-1073741824
; case dd<0 dr<0 near pmax*nmax+nmax-1 = -1073741823
.word 0140000,0100001, -32768., cp0000, 32766., -32767.;dd=-1073709055
.word 0140000,0100000, -32768., cp0000, 32767., 0.;dd=-1073709056
.word 0140000,0077777, -32768., cp0000, 32767., -1.;dd=-1073709057
.word 0140000,0000002, -32768., cp0000, 32767., -32766.;dd=-1073741822
.word 0140000,0000001, -32768., cp0000, 32767., -32767.;dd=-1073741823
.word 0140000,0000000, -32768., cp00v0, -16384., 0.;dd=-1073741824
.word 0137777,0177777, -32768., cp00v0, -16385., -1.;dd=-1073741825
;
1011$:
9999$: iot ; end of test A1.2
;
; END OF ALL TESTS - loop closure ============================================
;
mov tstno,r0 ; hack, for easy monitoring ...
cmp tstno,#2. ; all tests done ?
beq .+4
halt
;
jmp loop