doc: update differences docu [skip ci]

doc/w11a_diff_70_clr_sxt_write.md

@@ -0,0 +1,23 @@
+## Known differences between w11a and KB11-C (11/70)
+
+### `CLR` and `SXT` do a write
+
+In most instructions the destination is modified, only in `MOV(B)`, `CLR(B)`,
+and `SXT` the destination value is overwritten regardless of its previous
+content.
+
+The 11/70 microcode implements `MOV(B)` such that it ends with a `DATO`.
+However, `CLR(B)` and `SXT` use a specifier flow like other updating
+instructions and perform a `DATIP`, without using the value, and `DATO`.
+The J11 does only a `DATO` in all three cases. See point 36 in the
+PDP-11 differences table.
+
+The w11a uses the `dstw` flow for all three instructions, and in this
+case behaves like a J11 and rather than an 11/70.
+
+This subtle difference might cause observable effects when reading a
+device register changes the state of a device.
+But for those registers it is unlikely to use `MOV` or `CLR`.
+Also, drivers are usually written to run on  11/70 and J11 systems.
+
+Therefore, this is considered an acceptable implementation difference.

doc/w11a_diff_70_mmu_trap_suppression.md

@@ -8,7 +8,7 @@ when an MMU register is accessed, thus `MMR0` to `MMR3` and any of the
 
 This causes test 061 of `ekbee1` to fail.
 
-The w11 doesn't implement this trap suppression (neither does SimH).
+The w11 doesn't implement this trap suppression (neither does SimH or e11).
 
 Since MMU traps are a 11/70,11/45 only feature no OS uses them.
 Given that, this is considered an acceptable deviation from 11/70 behavior.

doc/w11a_diff_70_red_stack_abort.md

@@ -1,13 +1,16 @@
 ## Known differences between w11a and KB11-C (11/70)
 
-### A 'red stack violation' loses PSW, a 0 is pushed onto the stack
+### 'fatal stack errors' lose PSW, a 0 is pushed onto the stack
 
 The 11/70, together with the 11/45, has the most elaborate stack protection
 system of all PDP-11 models. A stack push via kernel stack is aborted when the
 stack pointer is in the 'red zone' 16 words below the stack limit.
-An emergency stack is set up, `SP` is set to 4, and PSW and PC are stored.
+
+This is considered a 'fatal stack error', other cases are aborts due to odd
+address, non-existing memory or MMU aborts. In case of a 'fatal stack error'
+an emergency stack is set up, `SP` is set to 4, and PSW and PC are stored.
 
 The w11a loses the PSW, a 0 is pushed.
 
-'red stack aborts' are never recovered, all OS treat them as fatal errors.
+'fatal stack errors' are never recovered, all OS treat them as fatal errors.
 This difference is therefore considered an acceptable implementation difference.

doc/w11a_diff_70_spl_bug.md

@@ -20,3 +20,11 @@ But in supervisor and user mode `SPL` really acts as `NOOP`, so traps and
 interrupts are taken as for all other instructions.   
 
 **--> The w11a isn't bug compatible with the 11/70.**
+
+Drivers most likely do not depend on this specific `SPL` behavior.
+It is not mentioned in Processor or Architecture Handbooks, only in
+the 11/70 Technical Manual.
+But some `xxdp` test either explicitly check this, like `ekbbf0` test 032,
+or use it to set up an _instruction under test_, like `ekbbf0` tests 035, 047.
+So getting the kernel mode `SPL` behavior right is important for
+passing `ekbbf0`.

doc/w11a_diff_70_stklim_rset.md

@@ -0,0 +1,16 @@
+## Known differences between w11a and KB11-C (11/70)
+
+### Stack limit checks done independent of register set
+
+The 11/70 does a stack limit check (yellow or red zone) when
+- in kernel mode
+- register set 0 active
+- a write via SP with address modes 1, 2, 4, 6 is done,
+  thus (sp), (sp)+, -(sp), nn(sp)
+
+The fact that the check is only performed when register set 0 is active
+is only mentioned as a marginal note in the Technical Manual and can easily
+be checked in the Schematics.
+
+The w11 does stack limit checks independent of the register set selection
+in `PSW` bit 11.

doc/w11a_known_differences.md

@@ -6,8 +6,10 @@ The issues of the w11 CPU and systems are listed in a separate document
 
 ### Known differences between w11a and KB11-C (11/70)
 - [Instruction fetch after `SPL`](w11a_diff_70_spl_bug.md)
-- ['red stack violation' loses PSW](w11a_diff_70_red_stack_abort.md)
+- ['fatal stack errors' lose PSW](w11a_diff_70_red_stack_abort.md)
+- [Stack limit checks done independent of register set](w11a_diff_70_stklim_rset.md)
 - ['instruction completed flag' in `MMR0` is not implemented](w11a_diff_70_instruction_complete.md)
+- [`CLR` and `SXT` do a write](w11a_diff_70_clr_sxt_write.md)
 - [`jsr sp` pushes original `sp` value](w11a_diff_70_jsr_sp.md)
 - [18-bit UNIBUS address space not mapped](w11a_diff_70_unibus_mapping.md)
 - [MMU traps not suppressed when MMU register accessed](w11a_diff_70_mmu_trap_suppression.md)
@@ -16,6 +18,12 @@ All points relate to very 11/70 specific behavior, no operating system
 depends on them, therefore they are considered acceptable implementation
 differences.
 
+For a comprehensive list of differences between all PDP-11 models consult
+the _PDP-11 Family Differences Table_ in
+- [PDP-11 Architecture Handbook (1983)](http://wwcm.synology.me/pdf/EB-23657-18%20PDP-11%20Architecture%20Handbook.pdf) Appendix B p303
+- [PDP-11 MICRO/PDP-11 Handbook 1983-84](http://www.bitsavers.org/pdf/dec/pdp11/handbooks/EB-24944-18_Micro_PDP-11_Handbook_1983-84.pdf) Appendix G p387
+- and also [PDP-11 family differences appendix](https://gunkies.org/wiki/PDP-11_family_differences_appendix)
+
 ### Differences in unspecified behavior between w11a and KB11-C (11/70)
 - [State of N and Z and registers after a `DIV` abort with `V=1`](w11a_diff_70_div_after_v1.md)