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- migrate to rlink protocol version 4

Browse Source 
- Goals for rlink v4
    - 16 bit addresses (instead of 8 bit)
    - more robust encoding, support for error recovery at transport level
    - add features to reduce round trips
      - improved attention handling
      - new 'list abort' command
  - For further details see README_Rlink_V4.txt
- use own C++ based tcl shell tclshcpp instead of tclsh
This commit is contained in:
Walter F.J. Mueller
2014-12-20 16:39:52 +00:00
parent 093d540121
commit d87ac86f53
203 changed files with 9324 additions and 10881 deletions
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125
rtl/vlib/comlib/byte2cdata.vhd
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@@ -1,6 +1,6 @@
-- $Id: byte2cdata.vhd 427 2011-11-19 21:04:11Z mueller $
-- $Id: byte2cdata.vhd 596 2014-10-17 19:50:07Z mueller $
--
-- Copyright 2007-2011 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
-- Copyright 2007-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
-- This program is free software; you may redistribute and/or modify it under
-- the terms of the GNU General Public License as published by the Free
@@ -18,10 +18,11 @@
-- Dependencies: -
-- Test bench: -
-- Target Devices: generic
-- Tool versions: xst 8.2, 9.1, 9.2, 12.1, 13.1; ghdl 0.18-0.29
-- Tool versions: xst 8.2-14.7; ghdl 0.18-0.31
--
-- Revision History:
-- Date Rev Version Comment
-- 2014-10-17 596 2.0 re-write, commas now 2 byte sequences
-- 2011-11-19 427 1.0.2 now numeric_std clean
-- 2007-10-12 88 1.0.1 avoid ieee.std_logic_unsigned, use cast to unsigned
-- 2007-08-27 76 1.0 Initial version
@@ -32,40 +33,34 @@ use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.slvtypes.all;
use work.comlib.all;
entity byte2cdata is -- byte stream -> 9bit comma,data
generic (
CPREF : slv4 := "1000"; -- comma prefix
NCOMM : positive := 4); -- number of comma chars
port (
CLK : in slbit; -- clock
RESET : in slbit; -- reset
DI : in slv8; -- input data
ENA : in slbit; -- write enable
BUSY : out slbit; -- write port hold
ENA : in slbit; -- input data enable
ERR : in slbit; -- input data error
BUSY : out slbit; -- input data busy
DO : out slv9; -- output data; bit 8 = comma flag
VAL : out slbit; -- read valid
HOLD : in slbit -- read hold
VAL : out slbit; -- output data valid
HOLD : in slbit -- output data hold
);
end byte2cdata;
architecture syn of byte2cdata is
type state_type is (
s_idle,
s_data,
s_escape
);
type regs_type is record
data : slv9; -- current data
state : state_type; -- state
data : slv9; -- data
dataval : slbit; -- data valid
edpend : slbit; -- edata pending
end record regs_type;
constant regs_init : regs_type := (
(others=>'0'),
s_idle
(others=>'0'), -- data
'0','0' -- dataval,edpend
);
signal R_REGS : regs_type := regs_init; -- state registers
@@ -73,10 +68,6 @@ architecture syn of byte2cdata is
begin
assert NCOMM <= 14
report "assert(NCOMM <= 14)"
severity FAILURE;
proc_regs: process (CLK)
begin
@@ -90,12 +81,13 @@ begin
end process proc_regs;
proc_next: process (R_REGS, DI, ENA, HOLD)
proc_next: process (R_REGS, DI, ENA, ERR, HOLD)
variable r : regs_type := regs_init;
variable n : regs_type := regs_init;
variable ival : slbit := '0';
variable idata : slv9 := (others=>'0');
variable iesc : slbit := '0';
variable ibusy : slbit := '0';
begin
@@ -103,46 +95,59 @@ begin
r := R_REGS;
n := R_REGS;
ival := '0';
ibusy := '1';
-- data path logic
idata := '1' & "00000" & "100"; -- clobber
iesc := '0';
case r.state is
when s_idle =>
ibusy := '0';
if ENA = '1' then
n.data := "0" & DI;
n.state := s_data;
if DI(7 downto 4) = CPREF then
if DI(3 downto 0) = "1111" then
n.state := s_escape;
elsif unsigned(DI(3 downto 0)) <= NCOMM then
n.data := "10000" & DI(3 downto 0);
n.state := s_data;
end if;
if r.edpend = '1' then
if DI(c_cdata_edf_pref) = c_cdata_ed_pref and
(not DI(c_cdata_edf_eci)) = DI(c_cdata_edf_ec) then
case DI(c_cdata_edf_ec) is
when c_cdata_ec_xon =>
idata := '0' & c_cdata_xon;
when c_cdata_ec_xoff =>
idata := '0' & c_cdata_xoff;
when c_cdata_ec_fill =>
idata := '0' & c_cdata_fill;
when c_cdata_ec_esc =>
idata := '0' & c_cdata_escape;
when others =>
idata := '1' & "00000" & DI(c_cdata_edf_ec);
end case;
end if;
else
idata := '0' & DI;
if DI = c_cdata_escape then
iesc := '1';
end if;
end if;
-- control path logic
ibusy := '1';
if HOLD = '0' then
ibusy := '0';
n.dataval := '0';
n.data := idata;
if ENA = '1' then
if r.edpend = '0' then
if iesc = '0' then
n.dataval := '1';
else
n.edpend := '1';
end if;
else
n.dataval := '1';
n.edpend := '0';
end if;
when s_data =>
ival := '1';
if HOLD = '0' then
n.state := s_idle;
end if;
when s_escape =>
ibusy := '0';
if ENA = '1' then
n.data := "0" & CPREF & DI(3 downto 0);
n.state := s_data;
end if;
when others => null;
end case;
elsif ERR = '1' then
n.dataval := '1';
end if;
end if;
N_REGS <= n;
DO <= r.data;
VAL <= ival;
DO <= r.data;
VAL <= r.dataval;
BUSY <= ibusy;
end process proc_next;