mirror of
https://github.com/wfjm/w11.git
synced 2026-03-10 12:58:23 +00:00
comment&code cosmetics
This commit is contained in:
wfjm
@@ -7,20 +7,17 @@ This file descibes general issues.
|
||||
|
||||
The case id indicates the release when the issue was first recognized.
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||||
|
||||
### V0.77-1 {[issue #19](https://github.com/wfjm/w11/issues/19)}
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||||
tcl commands like
|
||||
```
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||||
cpu0 get type
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||||
cpu0rka get class
|
||||
rlc get timeout
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||||
```
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||||
crash with a `SIGSEGV`. Apparently all getters which internally return a
|
||||
const reference are affected. Observed with gcc 5.4.0. Unclear whether this
|
||||
is a coding bug introduced when boost::bind was replaced by lambdas
|
||||
(in commit [1620ee3](https://github.com/wfjm/w11/commit/1620ee3)) or a
|
||||
compiler issue.
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||||
### V0.50-10 {[issue #20](https://github.com/wfjm/w11/issues/20)} -- DL11: output chars lost when device polling used
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Part of the console output can be lost when `xxdp` test `eqkce1` is
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run on FPGA, also some kernel messages during the 2.11bsd boot sequence.
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In both cases very simple polling output routines are used. Most likely
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cause is that device ready polls timeout before the rlink interface can
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serve the output request.
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### V0.76-3 {[issue #18](https://github.com/wfjm/w11/issues/18)}
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Will be overcome by a DL11 controller with more buffering and improved
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interrupt rate control.
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### V0.76-3 {[issue #18](https://github.com/wfjm/w11/issues/18)} -- w11 clock rate limited by CACHE-to-CACHE false path
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So far all Series-7 w11a systems ran with 80 MHz clock. The sys_w11_arty
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design (with DDR memory support via MIG) also achieves timing closure under
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Vivado 2017.2, but fails (with a small negative slack) under Vivado 2018.3.
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@@ -41,7 +38,7 @@ that 2018.3 is less tolerant to the sub-optimal w11a design.
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This will be fixed in a future release, either by setting up an appropriate
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false_path constraint, or by changing the data path structure.
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### V0.76-2 {[issue #17](https://github.com/wfjm/w11/issues/17)}
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### V0.76-2 {[issue #17](https://github.com/wfjm/w11/issues/17)} -- Help wanted: Testing with Arty S7 appreciated
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The w11a design for Arty S7 (50 die size), see rtl/sys_gen/w11a/artys7,
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was provided to support also an up-to-date Spartan-7 based board. Turned
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out that speed is equivalent to Artix-7. It is so far only simulation tested.
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@@ -52,7 +49,7 @@ documentation of your board to avoid potential damage.
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Looking forward to receive test reports.
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### V0.76-1 {[issue #16](https://github.com/wfjm/w11/issues/16)}
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### V0.76-1 {[issue #16](https://github.com/wfjm/w11/issues/16)} -- Help wanted: Testing with Nexys4 DDR appreciated
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The w11a design for Nexys4 DDR, see rtl/sys_gen/w11a/nexys4d, was provided
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to support also an up-to-date Nexys4 board. It is so far only simulation tested.
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@@ -63,34 +60,34 @@ to avoid potential damage.
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Looking forward to receive test reports.
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### V0.742-1 {[issue #14](https://github.com/wfjm/w11/issues/14)}
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### V0.742-1 {[issue #14](https://github.com/wfjm/w11/issues/14)} -- SEGFAULT core dump after detach
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The detach of a `tcp` type virtual terminal or a `tap` type virtual
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ethernet device can lead to a SEGFAULT core dump, e.g. after a
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`cpu0ttb0 det` command.
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This is caused by a race condition between the detach run-down and the
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implementation of `ReventLoop::RemovePollHandler()`.
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### V0.73-2 {[issue #10](https://github.com/wfjm/w11/issues/10)}
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### V0.73-2 {[issue #10](https://github.com/wfjm/w11/issues/10)} -- Many post-synthesis simulations fail
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Many post-synthesis functional and especially post-routing timing
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simulations currently fail due to startup and initialization problems.
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Cause is MMCM/PLL startup, which is not properly reflected in the test
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bench. Will be resolved in an upcoming release.
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### V0.73-1 {[issue #9](https://github.com/wfjm/w11/issues/9)}
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### V0.73-1 {[issue #9](https://github.com/wfjm/w11/issues/9)} -- Vivado xelab sometimes extremely slow
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as of vivado 2016.2 `xelab` shows sometimes extremely long build times,
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especially for generated post-synthesis vhdl models. But also building a
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behavioral simulation for a w11a design can take 25 min. Even though
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post-synthesis or post-routing models are now generated in verilog working
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with `xsim` is cumbersome and time consuming.
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### V0.66-1 {[issue #8](https://github.com/wfjm/w11/issues/8)}
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### V0.66-1 {[issue #8](https://github.com/wfjm/w11/issues/8)} -- TM11 controller doesn't support odd transfer size
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the TM11 controller transfers data byte wise (all disk do it 16bit
|
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word wise) and allows for odd byte length transfers. Odd length transfers
|
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are currently not supported and rejected as invalid command. Odd byte
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length records aren't used by OS, so in practice this limitation
|
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isn't relevant.
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### V0.65-2 {[issue #7](https://github.com/wfjm/w11/issues/7)}
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### V0.65-2 {[issue #7](https://github.com/wfjm/w11/issues/7)} -- Some exotic RH70/RP/RM features not implemented
|
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some exotic RH70/RP/RM features and conditions not implemented yet
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- last block transfered flag (in DS)
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- `CS2.BAI` currently ignored and not handled
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@@ -98,7 +95,7 @@ some exotic RH70/RP/RM features and conditions not implemented yet
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All this isn't used by any OS, so in practice not relevant.
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### V0.65-1 {[issue #6](https://github.com/wfjm/w11/issues/6)}
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### V0.65-1 {[issue #6](https://github.com/wfjm/w11/issues/6)} -- ti_rri crashes in normal rundown in very rare cases
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`ti_rri` sometimes crashes in normal rundown (exit or ^D) when
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a `cuff:` type rlink is active. One gets
|
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```
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@@ -107,24 +104,24 @@ a `cuff:` type rlink is active. One gets
|
||||
```
|
||||
Doesn't affect normal operation, will be fixed in upcoming release.
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||||
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||||
### V0.64-6 {[issue #5](https://github.com/wfjm/w11/issues/5)}
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### V0.64-6 {[issue #5](https://github.com/wfjm/w11/issues/5)} -- IO delays still unconstraint in Vivado
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IO delays still unconstraint in Vivado. All critical IOs use
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explicitly IOB flops, thus timing well defined.
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### V0.64-2 {[issue #4](https://github.com/wfjm/w11/issues/4)}
|
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### V0.64-2 {[issue #4](https://github.com/wfjm/w11/issues/4)} -- rlink throughput on basys3/nexys4 limited by serial port stack round trip times
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rlink throughput on basys3/nexys4 limited by serial port stack
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round trip times. Will be overcome by libusb based custom driver.
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||||
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### V0.64-1 {[issue #3](https://github.com/wfjm/w11/issues/3)}
|
||||
### V0.64-1 {[issue #3](https://github.com/wfjm/w11/issues/3)} -- Bad throughput for DL11 emulation for low speed links
|
||||
The large default transfer size for disk accesses leads to bad
|
||||
throughput in the DL11 emulation for low speed links, like the
|
||||
460kBaud the S3board is limited to. Will be overcome by a DL11
|
||||
controller with more buffering.
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||||
|
||||
### V0.62-2 {[issue #2](https://github.com/wfjm/w11/issues/2)}
|
||||
### V0.62-2 {[issue #2](https://github.com/wfjm/w11/issues/2)} -- rlink v4 error recovery not yet implemented, will crash on error
|
||||
rlink v4 error recovery not yet implemented, will crash on error.
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||||
|
||||
### V0.62-1 {[issue #1](https://github.com/wfjm/w11/issues/1)}
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||||
### V0.62-1 {[issue #1](https://github.com/wfjm/w11/issues/1)} -- rlink command lists aren't split to fit in retransmit buffer size
|
||||
rlink command lists aren't split to fit in retransmit buffer size.
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||||
|
||||
_{the last two issues are not relevant for w11 backend over USB usage because
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@@ -132,7 +129,32 @@ the backend produces proper command lists and the USB channel is usually error
|
||||
free}_
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||||
|
||||
## Resolved Issues
|
||||
### V0.73-3 {[issue #11](https://github.com/wfjm/w11/issues/11)}
|
||||
### V0.77-1 {[issue #19](https://github.com/wfjm/w11/issues/19)} -- tcl getters accessing a const reference crash with a SIGSEGV
|
||||
#### Original Issue
|
||||
tcl commands like
|
||||
```
|
||||
cpu0 get type
|
||||
cpu0rka get class
|
||||
rlc get timeout
|
||||
```
|
||||
crash with a `SIGSEGV`. Apparently all getters which internally return a
|
||||
const reference are affected. Observed with gcc 5.4.0. Unclear whether this
|
||||
is a coding bug introduced when `boost::bind` was replaced by lambdas
|
||||
(in commit [1620ee3](https://github.com/wfjm/w11/commit/1620ee3)) or a
|
||||
compiler issue.
|
||||
#### Fix
|
||||
The culprit was that automatic return type determination for the getter
|
||||
lambdas was used. This fails when the called method returns a reference of
|
||||
an object. The deduced lambda return type will the object, not a reference.
|
||||
Unfortunately this doesn't lead to a compile time error but to a run time error.
|
||||
|
||||
Bottom lime is
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||||
- automatic return type detection for lambda's can be error prone
|
||||
- it is safer and also more compact to use `std:bind` as method forwarder
|
||||
|
||||
Fixed with commit [6024dce](https://github.com/wfjm/w11/commit/6024dce).
|
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|
||||
### V0.73-3 {[issue #11](https://github.com/wfjm/w11/issues/11)} -- dmscnt and dmcmon disabled in Vivado based flows
|
||||
#### Original Issue
|
||||
The 'state number generator' code in `pdp11_sequencer` causes in vivado
|
||||
2016.1 (and .2) that the main FSM isn't re-coded anymore, which has high
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|
||||
@@ -59,11 +59,6 @@ differences.
|
||||
|
||||
### <a id="bug">Known bugs</a>
|
||||
|
||||
- **TCK-038 pri=H: DL11: output chars lost**
|
||||
Part of the output can be lost when `xxdp` test `eqkce1` is run on FPGA, also
|
||||
some kernel messages during the 211BSD boot sequence. Most likely cause is that
|
||||
device ready polls timeout before the rlink interface can serve the interrupt.
|
||||
|
||||
- **TCK-036 pri=L: RK11: hardware poll not working**
|
||||
The RK11/RK05 hardware poll logic is probably not reflecting the
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||||
behaviour of the real drive.
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||||
|
||||
@@ -1,4 +1,4 @@
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||||
-- $Id: sys_w11a_arty.vhd 1108 2019-02-02 23:04:38Z mueller $
|
||||
-- $Id: sys_w11a_arty.vhd 1116 2019-03-03 08:24:07Z mueller $
|
||||
--
|
||||
-- Copyright 2018-2019 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
|
||||
--
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||||
@@ -37,6 +37,7 @@
|
||||
--
|
||||
-- Synthesized:
|
||||
-- Date Rev viv Target flop lutl lutm bram slic
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||||
-- 2019-03-02 1116 2017.2 xc7a35t-1l 6625 10705 836 17.0 3218
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||||
-- 2019-02-02 1108 2018.3 xc7a35t-1l 6579 9839 819 17.0 3225
|
||||
-- 2019-02-02 1108 2017.2 xc7a35t-1l 6575 9798 802 17.0 3182
|
||||
--
|
||||
|
||||
@@ -1,4 +1,4 @@
|
||||
-- $Id: sys_w11a_b3.vhd 1108 2019-02-02 23:04:38Z mueller $
|
||||
-- $Id: sys_w11a_b3.vhd 1116 2019-03-03 08:24:07Z mueller $
|
||||
--
|
||||
-- Copyright 2015-2019 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
|
||||
--
|
||||
@@ -35,6 +35,7 @@
|
||||
--
|
||||
-- Synthesized:
|
||||
-- Date Rev viv Target flop lutl lutm bram slic
|
||||
-- 2019-03-02 1116 2017.2 xc7a35t-1 2748 5725 186 47.5 1811 +ibtst
|
||||
-- 2019-02-02 1108 2018.3 xc7a35t-1 2711 5910 170 47.5 1825
|
||||
-- 2019-02-02 1108 2017.2 xc7a35t-1 2698 5636 170 47.5 1728
|
||||
-- 2018-10-13 1055 2017.2 xc7a35t-1 2698 5636 170 47.5 1723 +dmpcnt
|
||||
|
||||
@@ -1,4 +1,4 @@
|
||||
-- $Id: sys_w11a_c7.vhd 1108 2019-02-02 23:04:38Z mueller $
|
||||
-- $Id: sys_w11a_c7.vhd 1116 2019-03-03 08:24:07Z mueller $
|
||||
--
|
||||
-- Copyright 2017-2019 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
|
||||
--
|
||||
@@ -37,6 +37,7 @@
|
||||
--
|
||||
-- Synthesized:
|
||||
-- Date Rev viv Target flop lutl lutm bram slic
|
||||
-- 2019-03-02 1116 2017.2 xc7a35t-1 3156 6332 198 50.0 1918 +ibtst
|
||||
-- 2019-02-02 1108 2018.3 xc7a35t-1 3112 6457 182 50.0 1936
|
||||
-- 2019-02-02 1108 2017.2 xc7a35t-1 3107 6216 182 50.0 1884
|
||||
-- 2018-10-13 1055 2017.2 xc7a35t-1 3107 6215 182 50.0 1889 +dmpcnt
|
||||
|
||||
@@ -1,4 +1,4 @@
|
||||
-- $Id: sys_w11a_n2.vhd 1108 2019-02-02 23:04:38Z mueller $
|
||||
-- $Id: sys_w11a_n2.vhd 1116 2019-03-03 08:24:07Z mueller $
|
||||
--
|
||||
-- Copyright 2010-2019 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
|
||||
--
|
||||
@@ -34,6 +34,7 @@
|
||||
--
|
||||
-- Synthesized (xst):
|
||||
-- Date Rev ise Target flop lutl lutm slic t peri
|
||||
-- 2019-03-02 1116 14.7 131013 xc3s1200e-4 3024 8246 526 5322 ok: +ibtst 61%
|
||||
-- 2019-01-27 1108 14.7 131013 xc3s1200e-4 2976 8101 510 5201 ok: -iist
|
||||
-- 2018-10-13 1055 14.7 131013 xc3s1200e-4 3097 8484 510 5471 ok: +dmpcnt
|
||||
-- 2018-09-15 1045 14.7 131013 xc3s1200e-4 2860 7983 446 5098 ok: +KW11P
|
||||
|
||||
@@ -1,4 +1,4 @@
|
||||
-- $Id: sys_w11a_n3.vhd 1108 2019-02-02 23:04:38Z mueller $
|
||||
-- $Id: sys_w11a_n3.vhd 1116 2019-03-03 08:24:07Z mueller $
|
||||
--
|
||||
-- Copyright 2011-2019 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
|
||||
--
|
||||
@@ -34,6 +34,7 @@
|
||||
--
|
||||
-- Synthesized (xst):
|
||||
-- Date Rev ise Target flop lutl lutm slic t peri
|
||||
-- 2019-03-02 1116 14.7 131013 xc6slx16-2 3048 5741 212 2030 ok: +ibtst 89%
|
||||
-- 2019-01-27 1108 14.7 131013 xc6slx16-2 2979 5542 201 2018 ok: -iist 88%
|
||||
-- 2018-10-13 1055 14.7 131013 xc6slx16-2 3057 5822 201 2064 ok: +dmpcnt 90%
|
||||
-- 2018-09-15 1045 14.7 131013 xc6slx16-2 2851 5453 177 1932 ok: +KW11P 84%
|
||||
|
||||
@@ -1,4 +1,4 @@
|
||||
-- $Id: sys_w11a_n4.vhd 1108 2019-02-02 23:04:38Z mueller $
|
||||
-- $Id: sys_w11a_n4.vhd 1116 2019-03-03 08:24:07Z mueller $
|
||||
--
|
||||
-- Copyright 2013-2019 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
|
||||
--
|
||||
@@ -35,6 +35,7 @@
|
||||
--
|
||||
-- Synthesized:
|
||||
-- Date Rev viv Target flop lutl lutm bram slic MHz
|
||||
-- 2019-03-02 1116 2017.2 xc7a100t-1 3200 6317 198 17.0 2032 80 +ibtst
|
||||
-- 2019-02-02 1108 2018.3 xc7a100t-1 3165 6497 182 17.0 2054 80
|
||||
-- 2019-02-02 1108 2017.2 xc7a100t-1 3146 6227 182 17.0 1982 80
|
||||
-- 2018-10-13 1056 2017.2 xc7a100t-1 3146 6228 182 17.0 1979 80 +dmpcnt
|
||||
|
||||
@@ -1,4 +1,4 @@
|
||||
-- $Id: sys_w11a_s3.vhd 1112 2019-02-17 11:10:04Z mueller $
|
||||
-- $Id: sys_w11a_s3.vhd 1116 2019-03-03 08:24:07Z mueller $
|
||||
--
|
||||
-- Copyright 2007-2019 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
|
||||
--
|
||||
@@ -33,6 +33,7 @@
|
||||
--
|
||||
-- Synthesized (xst):
|
||||
-- Date Rev ise Target flop lutl lutm slic t peri
|
||||
-- 2019-03-02 1116 14.7 131013 xc3s1000-4 2830 8045 462 5086 OK: +ibtst 66%
|
||||
-- 2019-01-27 1108 14.7 131013 xc3s1000-4 2782 7873 446 4942 OK: -iist 64%
|
||||
-- 2018-10-13 1055 14.7 131013 xc3s1000-4 2890 8217 446 5177 OK: +dmpcnt 67%
|
||||
-- 2018-09-15 1045 14.7 131013 xc3s1000-4 2670 7721 382 4851 OK: +KP11P 63%
|
||||
|
||||
@@ -1,4 +1,4 @@
|
||||
// $Id: Rw11.cpp 1114 2019-02-23 18:01:55Z mueller $
|
||||
// $Id: Rw11.cpp 1117 2019-03-03 12:49:26Z mueller $
|
||||
//
|
||||
// Copyright 2013-2018 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
|
||||
//
|
||||
@@ -13,6 +13,7 @@
|
||||
//
|
||||
// Revision History:
|
||||
// Date Rev Version Comment
|
||||
// 2019-02-23 1114 1.1.5 use std::bind instead of lambda
|
||||
// 2018-12-19 1090 1.1.4 use RosPrintf(bool)
|
||||
// 2018-12-15 1082 1.1.3 use lambda instead of boost::bind
|
||||
// 2018-12-09 1080 1.1.2 use std::shared_ptr instead of boost and range loop
|
||||
|
||||
@@ -1,10 +1,11 @@
|
||||
# $Id: test_ibtst_regs.tcl 1112 2019-02-17 11:10:04Z mueller $
|
||||
# $Id: test_w11a_sdreg.tcl 1118 2019-03-05 19:26:39Z mueller $
|
||||
#
|
||||
# Copyright 2019- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
|
||||
# License disclaimer see License.txt in $RETROBASE directory
|
||||
#
|
||||
# Revision History:
|
||||
# Date Rev Version Comment
|
||||
# 2019-03-05 1118 1.01 use -wal
|
||||
# 2019-02-17 1113 1.0 Initial version
|
||||
#
|
||||
# Test cntl register response
|
||||
@@ -20,7 +21,7 @@ rlc log "test_w11a_sdreg: test switch and display register access -------------"
|
||||
# for display loc write --> rem read
|
||||
# for switch rem write --> loc read
|
||||
$cpu cp \
|
||||
-wa [cpu0 imap sdreg] \
|
||||
-wal [cpu0 imap sdreg] \
|
||||
-wm 0xaaaa \
|
||||
-wibr sdreg 0x5555 \
|
||||
-ribr sdreg -edata 0xaaaa \
|
||||
|
||||
@@ -1,4 +1,4 @@
|
||||
# $Id: w11a_all.dat 916 2017-06-25 13:30:07Z mueller $
|
||||
# $Id: w11a_all.dat 1113 2019-02-23 11:32:27Z mueller $
|
||||
#
|
||||
## steering file for all w11a tests
|
||||
#
|
||||
|
||||
@@ -1,4 +1,4 @@
|
||||
# $Id: test_rbtest.tcl 985 2018-01-03 08:59:40Z mueller $
|
||||
# $Id: test_rbtest.tcl 1115 2019-02-24 12:53:04Z mueller $
|
||||
#
|
||||
# Copyright 2011-2017 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
|
||||
#
|
||||
@@ -56,7 +56,7 @@ namespace eval rbmoni {
|
||||
set vtestat 0xf
|
||||
set vtedata 0x1234
|
||||
|
||||
# write/read te.stat and te.data with rbmoni on; check that 4 lines aquired
|
||||
# write/read te.stat and te.data with rbmoni on; check 4 lines acquired
|
||||
rlc exec \
|
||||
-wreg rm.cntl [regbld rbmoni::CNTL {func "STA"}] \
|
||||
-wreg te.stat $vtestat \
|
||||
|
||||
@@ -1,4 +1,4 @@
|
||||
# $Id: util.tcl 985 2018-01-03 08:59:40Z mueller $
|
||||
# $Id: util.tcl 1116 2019-03-03 08:24:07Z mueller $
|
||||
#
|
||||
# Copyright 2011-2017 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
|
||||
#
|
||||
@@ -30,8 +30,8 @@ namespace eval rbtest {
|
||||
#
|
||||
# setup register descriptions for rbd_tester
|
||||
#
|
||||
regdsc INIT {fifo 2} {data 1} {cntl 0}; # for rbus init against base addr
|
||||
regdsc CNTL {wchk 15} {nbusy 9 10}
|
||||
regdsc INIT {fifo 2} {data 1} {cntl 0}
|
||||
#
|
||||
# setup: amap definitions for rbd_tester
|
||||
#
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
#! /usr/bin/env tclshcpp
|
||||
# $Id: setup_packages 1111 2019-02-10 16:13:55Z mueller $
|
||||
# $Id: setup_packages 1118 2019-03-05 19:26:39Z mueller $
|
||||
#
|
||||
# pkg_mkIndex uses tclLog to write, which by default writes to stderr
|
||||
# this is 'make -s' unfriendly, so redefined tclLog to use plain puts
|
||||
@@ -26,6 +26,7 @@ pkg_mkIndex -verbose rbsysmon *.tcl
|
||||
pkg_mkIndex -verbose rw11 *.tcl
|
||||
pkg_mkIndex -verbose rw11util *.tcl
|
||||
#
|
||||
# each package in following section should be also included in regmap.tcl
|
||||
pkg_mkIndex -verbose ibd_deuna *.tcl
|
||||
pkg_mkIndex -verbose ibd_dl11 *.tcl
|
||||
pkg_mkIndex -verbose ibd_ibmon *.tcl
|
||||
|
||||
Reference in New Issue
Block a user