wfjm
e1abc27983
comment&code cosmetics; minor changes
2018-11-11 09:50:46 +01:00
wfjm
22bb8e011c
reorganize dcm/mmcm/ppl sim models
...
- sfs_gsim_core: new common simulation core
- {dcm,s6_cmt,s7_cmt}_sfs_gsim: use now sfs_gsim_core
- s7_cmt_sfs_tb: removed, use now sfs_gsim_core
- rtl/bplib/*/tb/tb_*: use now sfs_gsim_core
- tst_serloop/nexys*/tb/tb_tst_serloop*_n*: use now sfs_gsim_core
2018-11-09 17:48:56 +01:00
wfjm
286a8cdaff
add forgotten tb_c7_sram_memctl
2018-08-10 22:17:22 +02:00
wfjm
dfa2a91a18
get disclaimers in line with GPL V3 License.txt
2018-01-02 21:57:40 +01:00
wfjm
8c57be520f
c7_sram_memctl: shorten ce and oe time
2017-07-02 14:22:20 +02:00
wfjm
62eb016ec2
add missing file; minor updates
2017-07-01 13:42:40 +02:00
wfjm
05c7d937c7
Add Digilent Cmod A7 (35 die size) support
...
- general board support
- c7_sram_memctl: SRAM memory controller (incl tb)
- is61wv5128bll: simple memory model (incl tb)
- sn_humanio_emu_rbus: human IO emulator
- 92-retro-usb-persistent.rules: add more board rules
- associated changes
- sn_humanio_rbus: add stat_rbf_emu (=0); single cycle btn pulses
- rgbdrv_analog(_rbus): add ACTLOW generic to invert output polarity
- ti_rri: adopt Digilent autodetect for CmodA7
- add systems
- tst_rlink: rlink tested
- tst_sram: SRAM tester
- w11a: w11a system with 672 kB memory (512 SRAM + 160 BRAM)
2017-06-28 22:29:09 +02:00
