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30 lines
1.4 KiB
Markdown
30 lines
1.4 KiB
Markdown
## Known differences between SimH, 11/70, and w11a
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### SimH: `MMR1` recording has J11 behavior
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The register `MMR1` records register modifications and can be used in the event
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of an MMU abort to rollback the register state and re-execute the instruction.
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Explicit `PC` modifications from addressing mode 2 or 3 accesses can be
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recorded, but are ignored in MMU abort handling because the `PC` roll back
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is done with `MMR2`. Implicit `PC` modifications from instruction fetch or
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index word reads are never recorded in `MMR1`.
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Essential is, that the content of `MMR1` reflects the register modifications
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_at the time of the instruction abort_.
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The 11/70 and the J11 `MMR1` recording behavior differs in several respects:
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- for instructions with implicit stack pops (`RTS`, `MTPI`, `MTPD`) the
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11/70 updates the `SP` and records this in `MMR1` before accessing the stack
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value and detecting an MMU abort. The J11 increments `SP` after the stack
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access.
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- the 11/70 records `PC` changes from immediate value are absolute
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addressing modes. The J11, with a much more sophisticated instruction
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stream prefetch, doesn't.
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SimH uses the J11 `MMR1` behavior for all models.
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w11 implements the 11/70 behavior. This is verified in a
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[tcode](../tools/tcode/README.md), the tests are skipped when executed on SimH
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(see [cpu_mmu.mac](../tools/tcode/cpu_mmu.mac) test C1.1 and C2.3).
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Tested with SimH V3.12-3.
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