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- rtl/w11a/ - pdp11_dpath.vhd: use c_dpath_dsrc_src,c_dpath_ddst_dst - pdp11_sequencer.vhd: BUGFIX: cc state unchanged after abort (mtp/mfp) - tools/tcode - cpu_basics.mac: add F4.1-6 - cpu_details.mac: add B3.2-3
33 lines
1.5 KiB
Markdown
33 lines
1.5 KiB
Markdown
## Known differences between SimH, 11/70, and w11a
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### SimH: condition codes are not always unchanged after an abort
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The PDP-11 architecture requires that
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- for direct writes to the `PSW`, the cc state of the write must prevail
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- the cc state must remain unchanged after an instruction abort
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To satisfy the first requirement, SimH updates the condition codes
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for `MOV`, `CLR`, `SXT`, `MFP*`, and `MTP*` _before_ the last write is
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executed. This ensures that in direct writes to the `PSW` the cc state
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of the write prevails, simply because an explicit `PSW` write is done
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_after_ the instruction level condition code update and overwrites it.
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However, an address error abort on the last write would leave the CPU in a
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state with modified condition codes, which violates of the second requirement.
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A detailed analysis shows that this bug has in practice no consequences
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- `SXT` depends on the `N` bit, but this bit is not changed by this
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instruction, so a re-execution with Z, V, or C changed will give a
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correct result.
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- the other affected instructions don't depend on the cc state, so a
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re-execution with a changed initial cc state will give the same result.
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Confirmed deficiency, might be fixed in a future release.
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The w11 implements instruction aborts correctly, the condition codes are not
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unchanged when an instruction is aborted. The corresponding tests are skipped
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when executed on SimH
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(see [cpu_details.mac](../tools/tcode/cpu_details.mac) tests B3.1-3).
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Tested with SimH V3.12-3.
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