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- rtl/w11a - pdp11.vhd: vm_stat_type: add err_ser - pdp11_sequencer.vhd: BUGFIX: handle CPUERR.rsv correctly - pdp11_vmbox.vhd: use err_ser to indicate fatal stack error - tools/tcode/cpu_details.mac: update A2.7-10
28 lines
1.1 KiB
Markdown
28 lines
1.1 KiB
Markdown
## Known differences between SimH, 11/70, and w11a
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### SimH: `CPUERR.rsv` has J11 behavior
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The `CPUERR` register in an 11/70 and the J11 has 6 flags that allow the cause
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of vector 4 abort to be determined.
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For an 11/70, the bit 2 is referred to as _'Red Zone Stack Limit'_ in the
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documentation. It is set when a stack limit error is detected.
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Other address errors that escalate to a fatal stack error do not set this bit.
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For a J11, bit 2 has the very similar name _'Red Stack Trap'_, and is set
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whenever a fatal stack error is detected, and thus also when other address
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errors escalate to a fatal stack error.
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The key differences are:
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- on an 11/70, an escalated MMU kernel stack abort will not set any
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`CPUERR` bits.
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- on a J11, every stack error that causes an emergency stack will set the
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`rsv` bit.
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SimH implements the J11 behavior also in 11/70 mode.
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w11 implements the 11/70 behavior. This is verified in a
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[tcode](../tools/tcode/README.md), the test is modified when executed on SimH
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(see [cpu_details.mac](../tools/tcode/cpu_details.mac) test A2.7-10).
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Tested with SimH V3.12-3.
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