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- rtl/w11a - pdp11.vhd: add cpustat_type in_vecflow - pdp11_sequencer.vhd: BUGFIX: get correct PS after vector push abort - tools - tcode/cpu_details.mac: add test A3.5 - tcode/cpu_mmu.mac: add test C2.5, C2.6, C2.7 - xxdp/ekbee1_patch_1170.scmd: fix test 122 - xxdp/ekbee1_patch_w11a.tcl: fix test 122
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1.5 KiB
Known differences between SimH, 11/70, and w11a
The SimH simulator focuses on the behavior that is relevant to the normal
operation of operating systems and user code. Model differences that are
operation relevant, e.g. in probe routines or model-dependent kernel routines,
are handled correctly epending on the set cpu configuration.
However, many model variations that do not effect normal operation are not
modeled for performance reasons. In these cases, the J11 behavior is often used
for all PDP-11 models, and also when set cpu 11/70 is configured.
Test codes are sometimes sensitive to those details, so the most relevant ones are listed here:
- SimH: State of N and Z and registers after a
DIVabort withV=1 - SimH: stack limit check and addressing modes
- SimH: stack limit check and vector push aborts
- SimH: Red stack zone PSW protection
- SimH: trap and interrupt service order has J11 behavior
- SimH: traced
WAIThas J11 behavior - SimH:
SPLdoesn't have 11/70 behavior - SimH: MMU traps not suppressed when MMU register accessed
- SimH: implicit stack pops not recorded in
MMR1 - SimH: The 'instruction completed flag' in
MMR0is not implemented - SimH: MMU aborts have priority over NXM aborts