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- re-organized handling of board and derived clocks in test benches
- added message filter definitions for some designs (.mfset files)
- added Cypress EZ-USB FX2 controller (USB interface)
- added firmware for EZ-USB FX2 supporting jtag access and data transfer
- FPGA configure over USB now supported directly in make build flow
- added test systems for USB testing and rlink over USB verification
- no functional change of w11a CPU core or any pre-existing test systems
- Note: Carefully read the disclaimer about usage of USB VID/PID numbers
in the file README_USB-VID-PID.txt. You'll be responsible for any
misuse of the defaults provided with the project sources !!
9 lines
123 B
Plaintext
9 lines
123 B
Plaintext
# libs
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../vlib/slvtypes.vhd
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../ibus/iblib.vhd
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pdp11.vbom
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${sys_conf := sys_conf.vhd}
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# components
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# design
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pdp11_sys70.vhd
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