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- re-organized handling of board and derived clocks in test benches
- added message filter definitions for some designs (.mfset files)
- added Cypress EZ-USB FX2 controller (USB interface)
- added firmware for EZ-USB FX2 supporting jtag access and data transfer
- FPGA configure over USB now supported directly in make build flow
- added test systems for USB testing and rlink over USB verification
- no functional change of w11a CPU core or any pre-existing test systems
- Note: Carefully read the disclaimer about usage of USB VID/PID numbers
in the file README_USB-VID-PID.txt. You'll be responsible for any
misuse of the defaults provided with the project sources !!
80 lines
3.3 KiB
Plaintext
80 lines
3.3 KiB
Plaintext
;;; -*- asm -*-
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;;; $Id: startup.a51 395 2011-07-17 22:02:55Z mueller $
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;;;
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;;;-----------------------------------------------------------------------------
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;;; Startup code
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;;;-----------------------------------------------------------------------------
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;;; Code taken from USRP2 firmware (GNU Radio Project), version 3.0.2,
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;;; Copyright 2003 Free Software Foundation, Inc.
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;;;-----------------------------------------------------------------------------
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;;; This code is part of usbjtag. usbjtag is free software; you can redistribute
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;;; it and/or modify it under the terms of the GNU General Public License as
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;;; published by the Free Software Foundation; either version 2 of the License,
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;;; or (at your option) any later version. usbjtag is distributed in the hope
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;;; that it will be useful, but WITHOUT ANY WARRANTY; without even the implied
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;;; warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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;;; GNU General Public License for more details. You should have received a
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;;; copy of the GNU General Public License along with this program in the file
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;;; COPYING; if not, write to the Free Software Foundation, Inc., 51 Franklin
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;;; St, Fifth Floor, Boston, MA 02110-1301 USA
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;;;-----------------------------------------------------------------------------
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;;; The default external memory initialization provided by sdcc is not
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;;; appropriate to the FX2. This is derived from the sdcc code, but uses
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;;; the FX2 specific _MPAGE sfr.
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;; .area XISEG (XDATA) ; the initialized external data area
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;; .area XINIT (CODE) ; the code space consts to init XISEG
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.area XSEG (XDATA) ; zero initialized xdata
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.area USBDESCSEG (XDATA) ; usb descriptors
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.area CSEG (CODE)
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;; sfr that sets upper address byte of MOVX using @r0 or @r1
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_MPAGE = 0x0092
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__sdcc_external_startup::
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;; This system is now compiled with the --no-xinit-opt
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;; which means that any initialized XDATA is handled
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;; inline by code in the GSINIT segs emitted for each file.
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;;
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;; We zero XSEG and all of the internal ram to ensure
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;; a known good state for uninitialized variables.
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; _mcs51_genRAMCLEAR() start
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mov r0,#l_XSEG
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mov a,r0
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orl a,#(l_XSEG >> 8)
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jz 00002$
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mov r1,#((l_XSEG + 255) >> 8)
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mov dptr,#s_XSEG
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clr a
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00001$: movx @dptr,a
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inc dptr
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djnz r0,00001$
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djnz r1,00001$
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;; We're about to clear internal memory. This will overwrite
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;; the stack which contains our return address.
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;; Pop our return address into DPH, DPL
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00002$: pop dph
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pop dpl
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;; R0 and A contain 0. This loop will execute 256 times.
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;;
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;; FWIW the first iteration writes direct address 0x00,
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;; which is the location of r0. We get lucky, we're
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;; writing the correct value (0)
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00003$: mov @r0,a
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djnz r0,00003$
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push dpl ; restore our return address
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push dph
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mov dpl,#0 ; indicate that data init is still required
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ret
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