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https://github.com/wfjm/w11.git
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cb7b906089
- sys_tst_sram_arty: add system and tb - sramif_mig_arty: add SRAM to DDR via MIG adapter for arty - cdc_pulse: add clock domain crossing for a slowly changing value - cdc_vector_s0: add ENA port (now used in cdc_pulse) - tst_mig/util.tcl: test_rwait: add optional lena argument - viv_tools_build.tcl: downgrade SSN critical warnings to warnings
23 lines
1.2 KiB
Markdown
23 lines
1.2 KiB
Markdown
This directory sub-tree contains **support modules for boards or parts**
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and is organized in
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| Directory | Content |
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| --------- | ------- |
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| [arty](arty) | support for Digilent Arty board |
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| [artys7](artys7) | support for Digilent Arty S7 board |
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| [atlys](atlys) | support for Digilent Atlys board |
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| [basys3](basys3) | support for Digilent Basys3 board |
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| [bpgen](bpgen) | interfaces for IO devices common on Digilent boards |
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| [cmoda7](cmoda7) | support for Digilent Cmod A7 board |
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| [fx2lib](fx2lib) | interface for Cypress FX2 USB |
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| [fx2rlink](fx2rlink) | modules for rlink over Cypress FX2 |
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| [issi](issi) | simulation models for ISSI components |
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| [micron](micron) | simulation models for Micron components |
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| [mig](mig) | interface for MIG cores |
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| [nexys2](nexys2) | support for Digilent Nexys2 board |
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| [nexys3](nexys3) | support for Digilent Nexys3 board |
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| [nexys4](nexys4) | support for Digilent Nexys4 board (cram version) |
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| [nxcramlib](nxcramlib) | interface for ISSI CRAM |
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| [s3board](s3board) | support for Digilent S3BOARD board |
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| [sysmon](sysmon) | interface for Xilinx Series-7 sysmon |
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