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wfjm.w11/rtl/sys_gen
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wfjm 600dd42e69 get ready for vivado 2019.1 
- sys_w11a_arty: down-rate to 72 MHz, viv 2019.1 fails with 75 MHz
- sys_w11a_*.vmfset: add new rule for vivado 2019.1
2019-06-07 19:44:19 +02:00
..
tst_mig
update message filters
2019-02-15 18:44:55 +01:00
tst_rlink
update message filters
2019-02-15 18:44:55 +01:00
tst_rlink_cuff
update message filters
2019-02-15 18:44:55 +01:00
tst_serloop
update message filters
2019-02-15 18:44:55 +01:00
tst_snhumanio
update message filters
2019-02-15 18:44:55 +01:00
tst_sram
minor changes and fixes
2019-03-08 17:52:34 +01:00
w11a
get ready for vivado 2019.1
2019-06-07 19:44:19 +02:00
README.md
add sys_tst_mig_arty system: a MIG tester
2019-01-01 22:41:44 +01:00

README.md

This directory sub-tree contains HDL sources for top level designs and is organized in

Directory Content
tst_mig MIG core tester
tst_rlink rlink tester (over serial links)
tst_rlink_cuff rlink tester (over Cypress FX2 USB)
tst_serloop serial port loop back tester
tst_snhumanio Digilent board human IO tester
tst_sram memory tester (SRAM or CRAM)
w11a w11a systems