mirror of
https://github.com/wfjm/w11.git
synced 2026-02-01 06:33:07 +00:00
9b7b3bd5c8
- ibus/ib_rlim_gen: add CPUSUSP port; RLIM_CEV now slv8
- ibus/ib_rlim_slv: RLIM_CEV now slv8
- ibus/ibdr_{dl11,lp11_buf}: RLIM_CEV now slv8
- bin/asm-11: fix -help text
- bin/ldadump: added, lda file dumper
- src
- Rw11Cntl: add UnitSetup(), UnitSetupAll()
- Rw11Cntl{DEUNA,DL11,RHRP,RK11,RL11,TM11}: call UnitSetupAll() in Start()
- Rw11CntlLP11: remove SetOnline(), use UnitSetup()
- Rw11CntlPC11:
- BootCode(): boot loader rewritten
- remove SetOnline(), use UnitSetup()
- Rw11Cpu
- add defs for w11 cpu component addresses;
- add MemSize(),MemWriteByte()
- LoadAbs(): return start, better odd byte handling;
- Rw11VirtStream: add Error(),Eof()
- RtclRw11Cpu:
- BUGFIX: M_wtcpu(): check cpu attn in no-server case
- add MemSize() getter
- M_loadabs(): add -trace and start
- ibd_pc11/util.tcl: use rdy instead of done in PCSR
- rw11/util.tcl: setup_lp: add rlim option
This directory tree contains all HDL sources and is organized in
| Directory | Content |
|---|---|
| bplib | support modules for boards or parts |
| ibus | w11 ibus devices |
| make_ise | make includes for ISE build flows |
| make_viv | make includes for Vivado build flows |
| sys_gen | HDL sources for top level designs |
| vlib | wide range of support modules |
| w11a | HDL sources for w11a core |