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3f455d5236
- re-organize modules 'human I/O' interface on Digilent boards - add test designs for 'human I/O' interface for atlys,nexys2, and s3board - small updates in crc8 and dcm areas - with one exception all vhdl sources use now numeric_std
125 lines
4.6 KiB
VHDL
125 lines
4.6 KiB
VHDL
-- $Id: rbdlib.vhd 427 2011-11-19 21:04:11Z mueller $
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--
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-- Copyright 2010-2011 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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--
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-- This program is free software; you may redistribute and/or modify it under
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-- the terms of the GNU General Public License as published by the Free
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-- Software Foundation, either version 2, or at your option any later version.
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--
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-- This program is distributed in the hope that it will be useful, but
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-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
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-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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-- for complete details.
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--
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------------------------------------------------------------------------------
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-- Package Name: rbdlib
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-- Description: Definitions for rbus devices
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--
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-- Dependencies: -
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-- Tool versions: xst 12.1, 13.1; ghdl 0.29
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--
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-- Revision History:
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-- Date Rev Version Comment
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-- 2011-11-19 427 1.2.1 now numeric_std clean
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-- 2010-12-29 351 1.2 new address layout; add rbd_timer
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-- 2010-12-27 349 1.1 now correct defs for _rbmon and _eyemon
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-- 2010-12-04 343 1.0 Initial version
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------------------------------------------------------------------------------
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--
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-- base addresses of some standard rbus devices
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--
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-- rbd_rbmon 111111xx -++-- these three used as monitors
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-- rbd_eyemon 111110xx /
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-- rbd_rlstat 1111011x /
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-- rbd_bram 1111010x \
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-- rbd_tester 111100xx +- all five used in test benchs
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--
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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use work.slvtypes.all;
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use work.rblib.all;
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package rbdlib is
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-- ise 13.1 xst can bug check if generic defaults in a package are defined via
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-- 'slv(to_unsigned())'. The conv_ construct prior to numeric_std was ok.
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-- As workaround the ibus default addresses are defined here as constant.
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constant rbaddr_tester : slv8 := slv(to_unsigned(2#11110000#,8));
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constant rbaddr_bram : slv8 := slv(to_unsigned(2#11110100#,8));
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constant rbaddr_rbmon : slv8 := slv(to_unsigned(2#11111100#,8));
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constant rbaddr_eyemon : slv8 := slv(to_unsigned(2#11111000#,8));
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constant rbaddr_timer : slv8 := slv(to_unsigned(2#00000000#,8));
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component rbd_tester is -- rbus dev: rbus tester
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-- complete rbus_aif interface
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generic (
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RB_ADDR : slv8 := rbaddr_tester);
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port (
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CLK : in slbit; -- clock
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RESET : in slbit; -- reset
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RB_MREQ : in rb_mreq_type; -- rbus: request
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RB_SRES : out rb_sres_type; -- rbus: response
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RB_LAM : out slv16; -- rbus: look at me
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RB_STAT : out slv3 -- rbus: status flags
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);
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end component;
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component rbd_bram is -- rbus dev: bram test target
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-- incomplete rbus_aif interface
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generic (
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RB_ADDR : slv8 := rbaddr_bram);
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port (
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CLK : in slbit; -- clock
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RESET : in slbit; -- reset
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RB_MREQ : in rb_mreq_type; -- rbus: request
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RB_SRES : out rb_sres_type -- rbus: response
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);
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end component;
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component rbd_rbmon is -- rbus dev: rbus monitor
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generic (
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RB_ADDR : slv8 := rbaddr_rbmon;
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AWIDTH : positive := 9);
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port (
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CLK : in slbit; -- clock
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RESET : in slbit; -- reset
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RB_MREQ : in rb_mreq_type; -- rbus: request
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RB_SRES : out rb_sres_type; -- rbus: response
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RB_SRES_SUM : in rb_sres_type -- rbus: response (sum for monitor)
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);
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end component;
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component rbd_eyemon is -- rbus dev: eye monitor for serport's
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generic (
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RB_ADDR : slv8 := rbaddr_eyemon;
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RDIV : slv8 := (others=>'0'));
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port (
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CLK : in slbit; -- clock
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RESET : in slbit; -- reset
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RB_MREQ : in rb_mreq_type; -- rbus: request
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RB_SRES : out rb_sres_type; -- rbus: response
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RXSD : in slbit; -- rx: serial data
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RXACT : in slbit -- rx: active (start seen)
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);
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end component;
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component rbd_timer is -- rbus dev: usec precision timer
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generic (
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RB_ADDR : slv8 := rbaddr_timer);
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port (
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CLK : in slbit; -- clock
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CE_USEC : in slbit; -- usec pulse
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RESET : in slbit; -- reset
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RB_MREQ : in rb_mreq_type; -- rbus: request
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RB_SRES : out rb_sres_type; -- rbus: response
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DONE : out slbit; -- mark last timer cycle
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BUSY : out slbit -- timer running
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);
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end component;
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end package rbdlib;
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