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14 lines
468 B
Tcl
14 lines
468 B
Tcl
# -*- tcl -*-
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# $Id: generic_clk_100mhz.xdc 1190 2019-07-13 17:05:39Z mueller $
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# SPDX-License-Identifier: GPL-3.0-or-later
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# Copyright 2016- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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#
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# Generic constraint for pin CLK with a 100 MHz clock
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# Helpful for test benches and generic test synthesis
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#
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# Revision History:
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# Date Rev Version Comment
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# 2016-06-19 777 1.0 Initial version
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create_clock -name CLK -period 10 -waveform {0 5} [get_ports CLK]
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