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2407e662a9
- rtl/w11a - pdp11.vhd: add cpustat_type in_vecflow - pdp11_sequencer.vhd: BUGFIX: get correct PS after vector push abort - tools - tcode/cpu_details.mac: add test A3.5 - tcode/cpu_mmu.mac: add test C2.5, C2.6, C2.7 - xxdp/ekbee1_patch_1170.scmd: fix test 122 - xxdp/ekbee1_patch_w11a.tcl: fix test 122
24 lines
1.5 KiB
Markdown
24 lines
1.5 KiB
Markdown
# Known differences between SimH, 11/70, and w11a
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The SimH simulator focuses on the behavior that is relevant to the normal
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operation of operating systems and user code. Model differences that are
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operation relevant, e.g. in probe routines or model-dependent kernel routines,
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are handled correctly epending on the `set cpu` configuration.
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However, many model variations that do not effect normal operation are not
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modeled for performance reasons. In these cases, the J11 behavior is often used
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for all PDP-11 models, and also when `set cpu 11/70` is configured.
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Test codes are sometimes sensitive to those details, so the most relevant
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ones are listed here:
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- [SimH: State of N and Z and registers after a `DIV` abort with `V=1`](simh_diff_div_after_v1.md)
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- [SimH: stack limit check and addressing modes](simh_diff_stklim_amode.md)
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- [SimH: stack limit check and vector push aborts](simh_diff_stklim_vpush.md)
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- [SimH: Red stack zone PSW protection](simh_diff_red_psw.md)
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- [SimH: trap and interrupt service order has J11 behavior](simh_diff_service-order.md)
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- [SimH: traced `WAIT` has J11 behavior](simh_diff_traced-wait.md)
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- [SimH: `SPL` doesn't have 11/70 behavior](simh_diff_spl.md)
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- [SimH: MMU traps not suppressed when MMU register accessed](simh_diff_mmu_trap_suppression.md)
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- [SimH: implicit stack pops not recorded in `MMR1`](simh_diff_mmr1_rts_mtp.md)
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- [SimH: The 'instruction completed flag' in `MMR0` is not implemented](simh_diff_instruction_complete.md)
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- [SimH: MMU aborts have priority over NXM aborts](simh_diff_mmu_nxm_prio.md)
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