github.com/Gehstock.Mist_FPGA
1
0
Fork 0
mirror of https://github.com/Gehstock/Mist_FPGA.git synced 2026-03-10 04:24:25 +00:00
Code Issues Releases Wiki Activity

Update Tetris_MiST.sv

Browse Source
This commit is contained in:
Marcel
2019-12-18 01:41:01 +01:00
committed by GitHub
parent 08fee4aa6b
commit 2d9937d626
1 changed files with 2 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
Arcade_MiST/Atari Tetris/rtl/Tetris_MiST.sv
View File

@@ -105,7 +105,7 @@ sdram sdram(
.port1_d ( {ioctl_dout, ioctl_dout} ),
.port1_q ( ),
.cpu1_addr ( ioctl_downl ? 16'hffff : {2'b00, rom_addr[15:1]}),
.cpu1_addr ( ioctl_downl ? 16'hffff : {2'b0, rom_addr[15:1]}),
.cpu1_q ( rom_do ),
// port2 for gfx
@@ -277,4 +277,4 @@ always @(posedge clk_sys) begin
end
end
endmodule
endmodule