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mirror of https://github.com/Gehstock/Mist_FPGA.git synced 2026-01-18 00:52:09 +00:00
This commit is contained in:
Gehstock 2020-04-10 21:56:51 +02:00
parent ca65d33352
commit 4a5b9cfa8e
5 changed files with 2194 additions and 62 deletions

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@ -232,10 +232,10 @@ set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
# end DESIGN_PARTITION(Top)
# -------------------------
# end ENTITY(TenYardFight_MiST)
# -----------------------------
# -----------------------------
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

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@ -104,7 +104,6 @@ architecture struct of Sound_Board is
signal rom_cs : std_logic;
signal rom_do : std_logic_vector( 7 downto 0);
signal rom_addr : std_logic_vector(15 downto 0);
signal ay1_chan_a : std_logic_vector(7 downto 0);
signal ay1_chan_b : std_logic_vector(7 downto 0);
@ -156,7 +155,7 @@ wram_cs <= '1' when cpu_addr(15 downto 7) = X"00"&'1' else '0'; -- 0080-00FF
ports_cs <= '1' when cpu_addr(15 downto 4) = X"000" else '0'; -- 0000-000F
adpcm_cs <= '1' when cpu_addr(15 downto 14) = "00" and cpu_addr(11) = '1' and cpu_addr(1 downto 0) /= "00" else '0'; -- 0801-0802
irqraz_cs <= '1' when cpu_addr(15 downto 14) = "00" and cpu_addr(11) = '1' and cpu_addr(1 downto 0) = "00" else '0'; -- 0800
rom_cs <= '1' when cpu_addr(15 downto 14) >= "01" else '0'; -- 8000-FFFF
rom_cs <= '1' when cpu_addr(15) = '1' else '0'; -- 8000-FFFF
-- write enables
wram_we <= '1' when cpu_rw = '0' and wram_cs = '1' else '0';
@ -316,9 +315,8 @@ port map(
test_cc => open
);
rom_addr <= cpu_addr(15 downto 0) - x"8000";
snd_vma <= rom_cs and cpu_vma;
snd_rom_addr <= rom_addr(14 downto 0);
snd_rom_addr <= cpu_addr(14 downto 0);
-- cpu wram
cpu_ram : entity work.spram

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@ -79,41 +79,39 @@ use ieee.numeric_std.all;
entity TenYardFight is
port(
clock_36 : in std_logic;
clock_0p895 : in std_logic;
reset : in std_logic;
clock_36 : in std_logic;
clock_0p895 : in std_logic;
reset : in std_logic;
palmode : in std_logic;
-- tv15Khz_mode : in std_logic;
video_r : out std_logic_vector(1 downto 0);
video_g : out std_logic_vector(2 downto 0);
video_b : out std_logic_vector(2 downto 0);
video_clk : out std_logic;
video_csync : out std_logic;
video_blankn : out std_logic;
video_hs : out std_logic;
video_vs : out std_logic;
audio_out : out std_logic_vector(10 downto 0);
palmode : in std_logic;
cpu_rom_addr : out std_logic_vector(14 downto 0);
cpu_rom_do : in std_logic_vector( 7 downto 0);
snd_rom_addr : out std_logic_vector(14 downto 0);
snd_rom_do : in std_logic_vector(7 downto 0);
snd_vma : out std_logic;
sp_addr : out std_logic_vector(14 downto 0);
sp_graphx32_do : in std_logic_vector(31 downto 0);
-- tv15Khz_mode : in std_logic;
video_r : out std_logic_vector(1 downto 0);
video_g : out std_logic_vector(2 downto 0);
video_b : out std_logic_vector(2 downto 0);
video_clk : out std_logic;
video_csync : out std_logic;
video_blankn : out std_logic;
video_hs : out std_logic;
video_vs : out std_logic;
audio_out : out std_logic_vector(10 downto 0);
dip_switch_1 : in std_logic_vector(7 downto 0);
dip_switch_2 : in std_logic_vector(7 downto 0);
input_0 : in std_logic_vector(7 downto 0);
input_1 : in std_logic_vector(7 downto 0);
input_2 : in std_logic_vector(7 downto 0);
cpu_rom_addr : out std_logic_vector(14 downto 0);
cpu_rom_do : in std_logic_vector( 7 downto 0);
snd_rom_addr: out std_logic_vector(14 downto 0);
snd_rom_do : in std_logic_vector(7 downto 0);
snd_vma : out std_logic;
sp_addr : out std_logic_vector(14 downto 0);
sp_graphx32_do : in std_logic_vector(31 downto 0);
dip_switch_1 : in std_logic_vector(7 downto 0);
dip_switch_2 : in std_logic_vector(7 downto 0);
input_0 : in std_logic_vector(7 downto 0);
input_1 : in std_logic_vector(7 downto 0);
input_2 : in std_logic_vector(7 downto 0);
dl_clk : in std_logic;
dl_addr : in std_logic_vector(17 downto 0);
dl_data : in std_logic_vector( 7 downto 0);
dl_wr : in std_logic;
dl_clk : in std_logic;
dl_addr : in std_logic_vector(17 downto 0);
dl_data : in std_logic_vector( 7 downto 0);
dl_wr : in std_logic;
dbg_cpu_addr : out std_logic_vector(15 downto 0)
);
@ -163,10 +161,13 @@ architecture struct of TenYardFight is
signal flip : std_logic;
signal flip_int : std_logic;
signal chrram_addr: std_logic_vector(11 downto 0);
signal chrram_addr: std_logic_vector(10 downto 0);
signal chrram_we : std_logic;
signal chrram_do : std_logic_vector(7 downto 0);
signal chrram1_do : std_logic_vector(7 downto 0);
signal chrram2_do : std_logic_vector(7 downto 0);
signal chrram_do_to_cpu : std_logic_vector( 7 downto 0);
signal chrram_ce : std_logic :='0';
signal scroll_x : std_logic_vector(7 downto 0) := (others=>'0');
signal apply_xscroll : std_logic;
@ -518,7 +519,7 @@ spr_input_line_di <= spr_pixels(3 downto 0);
-- keep write data if input buffer is clear
spr_input_line_we <= '1' when spr_on_line_r = '1' and spr_pix_ena = '1' and spr_input_line_do = "0000" else '0';
-- feed output buufer (clear)
-- feed output buffer (clear)
spr_output_line_di <= "0000";
-- always clear just after read
spr_output_line_we <= pix_ena;
@ -554,15 +555,10 @@ hcnt_scrolled_flip <= hcnt_scrolled(2 downto 0) when flip = '1' else not (hcnt_s
-- address char attr at pixel # 0
-- address char code at pixel # 4
-- give access to CPU for all other pixels
-- todo not sure about this Gehstock
with hcnt_scrolled_flip(2 downto 0) select chrram_addr <=
vcnt_flip(7 downto 2) & hcnt_scrolled(7 downto 3) & '1' when "000",
vcnt_flip(7 downto 2) & hcnt_scrolled(7 downto 3) & '0' when "100",
cpu_addr(11 downto 0) when others;
vcnt_flip(7 downto 3) & hcnt_scrolled(7 downto 3) & '1' when "000",
vcnt_flip(7 downto 3) & hcnt_scrolled(7 downto 3) & '0' when "100",
cpu_addr(10 downto 0) when others;
-- write enable to char tile ram from CPU
chrram_we <= '1' when cpu_wr_n = '0' and cpu_addr(15 downto 12) = X"8" and hcnt_scrolled_flip(1 downto 0) /= "00" else '0';
@ -612,7 +608,6 @@ begin
end if;
end if;
end process;
---------------------------
-- mux char/sprite video --
---------------------------
@ -636,6 +631,7 @@ begin
end if;
end process;
---------------------------------------------------------
-- Sound board is same as Moon patrol (except CPU rom) --
---------------------------------------------------------
@ -799,25 +795,37 @@ port map(
q_b => scrollram_h_do
);
-- char RAM 0x8000-0x8FFF
chrram : entity work.gen_ram
generic map( dWidth => 8, aWidth => 12)
-- char RAM 0x8000-0x83FF 4A
chrram1: entity work.gen_ram
generic map( dWidth => 8, aWidth => 11)
port map(
clk => clock_36n,
we => chrram_we,
addr => chrram_addr,
d => cpu_do,
q => chrram_do
q => chrram1_do
);
-- char RAM 0x8400-0x8FFF 4C
chrram2: entity work.gen_ram
generic map( dWidth => 8, aWidth => 11)
port map(
clk => clock_36n,
we => chrram_we,
addr => chrram_addr,
d => cpu_do,
q => chrram2_do
);
chrram_do <= chrram1_do when chrram_ce = '0' else chrram2_do;
chrram_ce <= '0';--todo
-- sprite RAM 0xC820-0xC87F
sprite_ram : entity work.dpram
--generic map( dWidth => 8, aWidth => 8)
generic map( dWidth => 8, aWidth => 7)
port map(
clk_a => clock_36n,
we_a => sprram_we,
-- addr_a => cpu_addr(7 downto 0),
addr_a => cpu_addr(6 downto 0),
d_a => cpu_do,
clk_b => clock_36n,
@ -943,7 +951,7 @@ char_palette_l_we <= '1' when dl_wr = '1' and dl_addr(17 downto 8) = "1000100010
char_palette_h_we <= '1' when dl_wr = '1' and dl_addr(17 downto 8) = "1000100011" else '0'; --22300 - 223FF chr pal hi 256b yard.1d
chr_palette_do <= chr_paletteh_do(3 downto 0) & chr_palettel_do(3 downto 0);
-- sprite palette ROM 3D
-- Sprite Lut 2H
spr_palette : entity work.dpram
generic map( dWidth => 8, aWidth => 8)
port map(
@ -957,7 +965,7 @@ port map(
);
spr_palette_we <= '1' when dl_wr = '1' and dl_addr(17 downto 8) = "1000100100" else '0'; --22400 - 224FF spr lut 256b yard.2h
-- sprite rgb lut ROM 1B
-- Sprite Palette 3L
spr_rgb_lut : entity work.dpram
generic map( dWidth => 8, aWidth => 5)
port map(
@ -971,4 +979,28 @@ port map(
);
spr_rgb_lut_we <= '1' when dl_wr = '1' and dl_addr(17 downto 8) = "1000100101" else '0'; --22500 - 2251F spr pal 32b yard.1f
end struct;
end struct;
--M58-A-A Center PCB
--4x Rom 8k 3R,3N,3M,3K Main Rom yf-a-3p-b, yf-a-3n-b, yf-a-3m-b
--2xRam 2k 3J,3H Main Ram
--3xKNA6032701 5-6M,5-6K,5-6A-B Custom
--3x Rom 8k 3C,3D,3E-F Char Rom yf-a.3e, yf-a.3d, yf-a.3c
--2x Ram 2k 3J,3H Char Ram
--2x Rom 256b 5C,5D Char Palette yard.1c, yard.1d
--M58-B-A Buttom PVB
--1x Ram 2k 5L-M Sprite Ram
--6x Rom 8k 5A,5C,5F,5E,5J,5K Sprite Rom yf-b.5b, yf-b.5c, yf-b.5f, yf-b.5e, yf-b.5j, yf-b.5k
--1x Rom 24S10 256b 3L Sprite Lut yard.2h
--2x Ram 1k 1K,1F Sprite Ram
--1x Rom 18s030 32b 3L Sprite Palette yard.1f
--2x Ram 2k 5R,5N Ram
--1xKNA6032701 6-7P-R Custom
--2x Rom 24S10 256b 2R, 2P Radar Palette yard.2n, yard.2m

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@ -102,7 +102,9 @@ wire key_strobe;
wire [14:0] rom_addr;
wire [15:0] rom_do;
wire [14:0] snd_addr;
wire [15:0] snd_addr;
wire [14:0] snd_rom_addr;
wire [15:0] snd_do;
wire snd_vma;
wire [14:0] sp_addr;
@ -158,7 +160,7 @@ sdram sdram(
.cpu1_addr ( ioctl_downl ? 16'hffff : {2'b00, rom_addr[14:1]} ),
.cpu1_q ( rom_do ),
.cpu2_addr ( ioctl_downl ? 16'hffff : (16'h8000 + snd_addr[14:1]) ),
.cpu2_addr ( ioctl_downl ? 16'hffff : (snd_addr) ),
.cpu2_q ( snd_do ),
// port2 for sprite graphics
@ -185,6 +187,10 @@ always @(posedge clk_sd) begin
port2_req <= ~port2_req;
end
end
// async clock domain crossing here (clk_snd -> clk_sys)
snd_vma_r <= snd_vma;
snd_vma_r2 <= snd_vma_r;
if (snd_vma_r2) snd_addr <= snd_rom_addr + 15'h8000;
end
// reset signal generation
@ -202,6 +208,32 @@ always @(posedge clk_sys) begin
reset <= reset_count != 16'h0000;
end
/*
static INPUT_PORTS_START( yard )
PORT_INCLUDE(m58)
PORT_MODIFY("DSW2")
PORT_DIPNAME( 0x08, 0x08, "Slow Motion (Cheat)" ) PORT_DIPLOCATION("SW2:4") Listed as "Unused"
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
// In stop mode, press 2 to stop and 1 to restart
PORT_DIPNAME( 0x10, 0x10, "Stop Mode (Cheat)") PORT_DIPLOCATION("SW2:5") Listed as "Unused"
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x20, "Level Select (Cheat)" ) PORT_DIPLOCATION("SW2:6") Listed as "Unused"
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("DSW1")
PORT_DIPUNUSED_DIPLOC( 0x01, IP_ACTIVE_LOW, "SW1:1" )
PORT_DIPUNUSED_DIPLOC( 0x02, IP_ACTIVE_LOW, "SW1:2" )
PORT_DIPNAME( 0x0c, 0x0c, "Time Reduced by Ball Dead" ) PORT_DIPLOCATION("SW1:3,4")
PORT_DIPSETTING( 0x0c, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x08, "x1.3" )
PORT_DIPSETTING( 0x04, "x1.5" )
PORT_DIPSETTING( 0x00, "x1.8" )
IREM_Z80_COINAGE_TYPE_1_LOC(SW1)
INPUT_PORTS_END*/
wire [7:0] dip1 = ~8'b00000010;
wire [7:0] dip2 = ~{ 1'b0, invuln, 1'b0, 1'b0/*stop*/, 3'b010, flip };
@ -224,8 +256,8 @@ TenYardFight TenYardFight(
.cpu_rom_addr ( rom_addr ),
.cpu_rom_do ( rom_addr[0] ? rom_do[15:8] : rom_do[7:0] ),
.snd_rom_addr ( snd_addr ),
.snd_rom_do ( snd_addr[0] ? snd_do[15:8] : snd_do[7:0] ),
.snd_rom_addr ( snd_rom_addr),
.snd_rom_do ( snd_rom_addr[0] ? snd_do[15:8] : snd_do[7:0] ),
.snd_vma(snd_vma),
.sp_addr ( sp_addr ),
.sp_graphx32_do( sp_do ),

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