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mirror of https://github.com/Gehstock/Mist_FPGA.git synced 2026-01-19 09:18:02 +00:00

Add Rotated OSD for Super Breakout

This commit is contained in:
Marcel 2019-03-03 15:32:47 +01:00
parent 6a45e9687b
commit 6b7eeffe43
8 changed files with 314 additions and 191 deletions

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@ -11,6 +11,5 @@
-- F1 or F2 : Start
--
-- Joystick support.
--
--
-- OSD And Controls can be Rotated
----------------------------------------------------------------

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@ -18,14 +18,14 @@
#
# Quartus II 64-Bit
# Version 13.1.4 Build 182 03/12/2014 SJ Web Edition
# Date created = 15:18:38 May 31, 2018
# Date created = 14:46:37 March 03, 2019
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
# sprint1_assignment_defaults.qdf
# SuperBreakout_assignment_defaults.qdf
# If this file doesn't exist, see file:
# assignment_defaults.qdf
#
@ -41,50 +41,37 @@
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "13.0 SP1"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "19:52:16 OCTOBER 10, 2017"
set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
set_global_assignment -name LAST_QUARTUS_VERSION 13.1
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:rtl/build_id.tcl"
set_global_assignment -name SYSTEMVERILOG_FILE rtl/super_breakout_mist.sv
set_global_assignment -name VHDL_FILE rtl/super_breakout.vhd
set_global_assignment -name VHDL_FILE rtl/T65/T65_Pack.vhd
set_global_assignment -name VHDL_FILE rtl/T65/T65_MCode.vhd
set_global_assignment -name VHDL_FILE rtl/T65/T65_ALU.vhd
set_global_assignment -name VHDL_FILE rtl/T65/T65.vhd
set_global_assignment -name VHDL_FILE rtl/sync.vhd
set_global_assignment -name VHDL_FILE rtl/playfield.vhd
set_global_assignment -name VHDL_FILE rtl/motion.vhd
set_global_assignment -name VHDL_FILE rtl/cpu_mem.vhd
set_global_assignment -name SYSTEMVERILOG_FILE rtl/dac.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/video_mixer.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/scandoubler.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/keyboard.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/mist_io.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/osd.sv
set_global_assignment -name VERILOG_FILE rtl/pll.v
set_global_assignment -name VHDL_FILE rtl/audio.vhd
set_global_assignment -name VHDL_FILE rtl/paddle.vhd
set_global_assignment -name VHDL_FILE rtl/IO.vhd
set_global_assignment -name VHDL_FILE rtl/sprom.vhd
set_global_assignment -name VHDL_FILE rtl/dpram.vhd
set_global_assignment -name SYSTEMVERILOG_FILE rtl/joy2quad.sv
set_global_assignment -name VHDL_FILE rtl/quadrature_decoder.vhd
# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY "Cyclone III"
set_global_assignment -name ALLOW_POWER_UP_DONT_CARE OFF
set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS OFF
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
set_global_assignment -name TOP_LEVEL_ENTITY super_breakout_mist
# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EP3C25E144C8
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
set_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME "PASSIVE SERIAL"
set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON
set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
# Assembler Assignments
# =====================
set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
set_global_assignment -name GENERATE_RBF_FILE ON
# SignalTap II Assignments
# ========================
set_global_assignment -name ENABLE_SIGNALTAP OFF
set_global_assignment -name USE_SIGNALTAP_FILE output_files/stp3.stp
# Advanced I/O Timing Assignments
# ===============================
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
# ---------------------
# start ENTITY(sprint1)
# Pin & Location Assignments
# ==========================
set_location_assignment PIN_7 -to LED
set_location_assignment PIN_54 -to CLOCK_27
set_location_assignment PIN_144 -to VGA_R[5]
@ -118,52 +105,71 @@ set_location_assignment PIN_127 -to SPI_SS2
set_location_assignment PIN_91 -to SPI_SS3
set_location_assignment PIN_90 -to SPI_SS4
set_location_assignment PIN_13 -to CONF_DATA0
# end ENTITY(sprint1)
# -------------------
# --------------------------
# start ENTITY(sprint1_mist)
# Classic Timing Assignments
# ==========================
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY "Cyclone III"
set_global_assignment -name ALLOW_POWER_UP_DONT_CARE OFF
set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS OFF
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
set_global_assignment -name TOP_LEVEL_ENTITY super_breakout_mist
# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EP3C25E144C8
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
set_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME "PASSIVE SERIAL"
set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON
set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
# Assembler Assignments
# =====================
set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
set_global_assignment -name GENERATE_RBF_FILE ON
# SignalTap II Assignments
# ========================
set_global_assignment -name ENABLE_SIGNALTAP OFF
set_global_assignment -name USE_SIGNALTAP_FILE output_files/stp3.stp
# Power Estimation Assignments
# ============================
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
# Advanced I/O Timing Assignments
# ===============================
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
# ---------------------------------
# start ENTITY(super_breakout_mist)
# start DESIGN_PARTITION(Top)
# ---------------------------
# Incremental Compilation Assignments
# ===================================
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
# end DESIGN_PARTITION(Top)
# -------------------------
# end ENTITY(sprint1_mist)
# ------------------------
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name SYSTEMVERILOG_FILE rtl/super_breakout_mist.sv
set_global_assignment -name VHDL_FILE rtl/super_breakout.vhd
set_global_assignment -name VHDL_FILE rtl/T65/T65_Pack.vhd
set_global_assignment -name VHDL_FILE rtl/T65/T65_MCode.vhd
set_global_assignment -name VHDL_FILE rtl/T65/T65_ALU.vhd
set_global_assignment -name VHDL_FILE rtl/T65/T65.vhd
set_global_assignment -name VHDL_FILE rtl/sync.vhd
set_global_assignment -name VHDL_FILE rtl/playfield.vhd
set_global_assignment -name VHDL_FILE rtl/motion.vhd
set_global_assignment -name VHDL_FILE rtl/cpu_mem.vhd
set_global_assignment -name SYSTEMVERILOG_FILE rtl/dac.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/video_mixer.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/scandoubler.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/keyboard.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/mist_io.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/osd.sv
set_global_assignment -name VERILOG_FILE rtl/pll.v
set_global_assignment -name VHDL_FILE rtl/audio.vhd
set_global_assignment -name VHDL_FILE rtl/paddle.vhd
set_global_assignment -name VHDL_FILE rtl/IO.vhd
set_global_assignment -name VHDL_FILE rtl/sprom.vhd
set_global_assignment -name VHDL_FILE rtl/dpram.vhd
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_global_assignment -name SYSTEMVERILOG_FILE rtl/joy2quad.sv
# end ENTITY(super_breakout_mist)
# -------------------------------
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

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@ -1,2 +1,2 @@
`define BUILD_DATE "171221"
`define BUILD_TIME "172231"
`define BUILD_DATE "190303"
`define BUILD_TIME "152556"

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@ -11,13 +11,15 @@ module osd (
input SPI_SS3,
input SPI_DI,
input [1:0] rotate, //[0] - rotate [1] - left or right
// VGA signals coming from core
input [5:0] R_in,
input [5:0] G_in,
input [5:0] B_in,
input HSync,
input VSync,
// VGA signals going to video connector
output [5:0] R_out,
output [5:0] G_out,
@ -59,7 +61,7 @@ always@(posedge SPI_SCK, posedge SPI_SS3) begin
if(cnt == 7) begin
cmd <= {sbuf[6:0], SPI_DI};
// lower three command bits are line address
bcnt <= {sbuf[1:0], SPI_DI, 8'h00};
@ -91,7 +93,7 @@ reg [9:0] vs_low, vs_high;
wire vs_pol = vs_high < vs_low;
wire [9:0] dsp_height = vs_pol ? vs_low : vs_high;
wire doublescan = (dsp_height>350);
wire doublescan = (dsp_height>350);
reg ce_pix;
always @(negedge clk_sys) begin
@ -124,13 +126,13 @@ always @(posedge clk_sys) begin
hsD2 <= hsD;
// falling edge of HSync
if(!hsD && hsD2) begin
if(!hsD && hsD2) begin
h_cnt <= 0;
hs_high <= h_cnt;
end
// rising edge of HSync
else if(hsD && !hsD2) begin
else if(hsD && !hsD2) begin
h_cnt <= 0;
hs_low <= h_cnt;
v_cnt <= v_cnt + 1'd1;
@ -142,13 +144,13 @@ always @(posedge clk_sys) begin
vsD2 <= vsD;
// falling edge of VSync
if(!vsD && vsD2) begin
if(!vsD && vsD2) begin
v_cnt <= 0;
vs_high <= v_cnt;
end
// rising edge of VSync
else if(vsD && !vsD2) begin
else if(vsD && !vsD2) begin
v_cnt <= 0;
vs_low <= v_cnt;
end
@ -160,17 +162,30 @@ wire [9:0] h_osd_start = ((dsp_width - OSD_WIDTH)>> 1) + OSD_X_OFFSET;
wire [9:0] h_osd_end = h_osd_start + OSD_WIDTH;
wire [9:0] v_osd_start = ((dsp_height- (OSD_HEIGHT<<doublescan))>> 1) + OSD_Y_OFFSET;
wire [9:0] v_osd_end = v_osd_start + (OSD_HEIGHT<<doublescan);
wire [9:0] osd_hcnt = h_cnt - h_osd_start + 1'd1; // one pixel offset for osd_byte register
wire [9:0] osd_hcnt = h_cnt - h_osd_start;
wire [9:0] osd_vcnt = v_cnt - v_osd_start;
wire [9:0] osd_hcnt_next = osd_hcnt + 2'd1; // one pixel offset for osd pixel
wire [9:0] osd_hcnt_next2 = osd_hcnt + 2'd2; // two pixel offset for osd byte address register
wire osd_de = osd_enable &&
wire osd_de = osd_enable &&
(HSync != hs_pol) && (h_cnt >= h_osd_start) && (h_cnt < h_osd_end) &&
(VSync != vs_pol) && (v_cnt >= v_osd_start) && (v_cnt < v_osd_end);
reg [7:0] osd_byte;
always @(posedge clk_sys) if(ce_pix) osd_byte <= osd_buffer[{doublescan ? osd_vcnt[7:5] : osd_vcnt[6:4], osd_hcnt[7:0]}];
reg [10:0] osd_buffer_addr;
wire [7:0] osd_byte = osd_buffer[osd_buffer_addr];
reg osd_pixel;
wire osd_pixel = osd_byte[doublescan ? osd_vcnt[4:2] : osd_vcnt[3:1]];
always @(posedge clk_sys) begin
if(ce_pix) begin
osd_buffer_addr <= rotate[0] ? {rotate[1] ? osd_hcnt_next2[7:5] : ~osd_hcnt_next2[7:5],
rotate[1] ? (doublescan ? ~osd_vcnt[7:0] : ~{osd_vcnt[6:0], 1'b0}) :
(doublescan ? osd_vcnt[7:0] : {osd_vcnt[6:0], 1'b0})} :
{doublescan ? osd_vcnt[7:5] : osd_vcnt[6:4], osd_hcnt_next2[7:0]};
osd_pixel <= rotate[0] ? osd_byte[rotate[1] ? osd_hcnt_next[4:2] : ~osd_hcnt_next[4:2]] :
osd_byte[doublescan ? osd_vcnt[4:2] : osd_vcnt[3:1]];
end
end
assign R_out = !osd_de ? R_in : {osd_pixel, osd_pixel, OSD_COLOR[2], R_in[5:3]};
assign G_out = !osd_de ? G_in : {osd_pixel, osd_pixel, OSD_COLOR[1], G_in[5:3]};

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@ -0,0 +1,103 @@
--------------------------------------------------------------------------------
--
-- FileName: quadrature_decoder.vhd
-- Dependencies: None
-- Design Software: Quartus II 64-bit Version 13.1.0 Build 162 SJ Web Edition
--
-- HDL CODE IS PROVIDED "AS IS." DIGI-KEY EXPRESSLY DISCLAIMS ANY
-- WARRANTY OF ANY KIND, WHETHER EXPRESS OR IMPLIED, INCLUDING BUT NOT
-- LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
-- PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL DIGI-KEY
-- BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT OR CONSEQUENTIAL
-- DAMAGES, LOST PROFITS OR LOST DATA, HARM TO YOUR EQUIPMENT, COST OF
-- PROCUREMENT OF SUBSTITUTE GOODS, TECHNOLOGY OR SERVICES, ANY CLAIMS
-- BY THIRD PARTIES (INCLUDING BUT NOT LIMITED TO ANY DEFENSE THEREOF),
-- ANY CLAIMS FOR INDEMNITY OR CONTRIBUTION, OR OTHER SIMILAR COSTS.
--
-- Version History
-- Version 1.0 9/7/2017 Scott Larson
-- Initial Public Release
--
--------------------------------------------------------------------------------
LIBRARY ieee;
USE ieee.std_logic_1164.all;
ENTITY quadrature_decoder IS
GENERIC(
positions : INTEGER := 16; --size of the position counter (i.e. number of positions counted)
debounce_time : INTEGER := 50_000; --number of clock cycles required to register a new position = debounce_time + 2
set_origin_debounce_time : INTEGER := 500_000); --number of clock cycles required to register a new set_origin_n value = set_origin_debounce_time + 2
PORT(
clk : IN STD_LOGIC; --system clock
a : IN STD_LOGIC; --quadrature encoded signal a
b : IN STD_LOGIC; --quadrature encoded signal b
set_origin_n : IN STD_LOGIC; --active-low synchronous clear of position counter
direction : OUT STD_LOGIC; --direction of last change, 1 = positive, 0 = negative
position : BUFFER INTEGER RANGE 0 TO positions-1 := 0); --current position relative to index or initial value
END quadrature_decoder;
ARCHITECTURE logic OF quadrature_decoder IS
SIGNAL a_new : STD_LOGIC_VECTOR(1 DOWNTO 0); --synchronizer/debounce registers for encoded signal a
SIGNAL b_new : STD_LOGIC_VECTOR(1 DOWNTO 0); --synchronizer/debounce registers for encoded signal b
SIGNAL a_prev : STD_LOGIC; --last previous stable value of encoded signal a
SIGNAL b_prev : STD_LOGIC; --last previous stable value of encoded signal b
SIGNAL debounce_cnt : INTEGER RANGE 0 TO debounce_time; --timer to remove glitches and validate stable values of inputs
SIGNAL set_origin_n_new : STD_LOGIC_VECTOR(1 DOWNTO 0); --synchronizer/debounce registers for the set_origin_n input
SIGNAL set_origin_n_int : STD_LOGIC; --last debounced value of set_origin_n signal
SIGNAL set_origin_cnt : INTEGER RANGE 0 TO set_origin_debounce_time; --debounce counter for set_origin_n signal
BEGIN
PROCESS(clk)
BEGIN
IF(clk'EVENT AND clk = '1') THEN --rising edge of system clock
--synchronize and debounce a and b inputs
a_new <= a_new(0) & a; --shift in new values of 'a'
b_new <= b_new(0) & b; --shift in new values of 'b'
IF(((a_new(0) XOR a_new(1)) OR (b_new(0) XOR b_new(1))) = '1') THEN --a input or b input is changing
debounce_cnt <= 0; --clear debounce counter
ELSIF(debounce_cnt = debounce_time) THEN --debounce time is met
a_prev <= a_new(1); --update value of a_prev
b_prev <= b_new(1); --update value of b_prev
ELSE --debounce time is not yet met
debounce_cnt <= debounce_cnt + 1; --increment debounce counter
END IF;
--synchronize and debounce set_origin_n input
set_origin_n_new <= set_origin_n_new(0) & set_origin_n; --shift in new values of set_origin_n
IF((set_origin_n_new(0) XOR set_origin_n_new(1)) = '1') THEN --set_origin_n input is changing
set_origin_cnt <= 0; --clear debounce counter
ELSIF(set_origin_cnt = set_origin_debounce_time) THEN --debounce time is met
set_origin_n_int <= set_origin_n_new(1); --update value of set_origin_n_int
ELSE --debounce time is not yet met
set_origin_cnt <= set_origin_cnt + 1; --increment debounce counter
END IF;
--determine direction and position
IF(set_origin_n_int = '0') THEN --inital position is being set
position <= 0; --clear position counter
ELSIF(debounce_cnt = debounce_time --debounce time for a and b is met
AND ((a_prev XOR a_new(1)) OR (b_prev XOR b_new(1))) = '1') THEN --AND the new value is different than the previous value
direction <= b_prev XOR a_new(1); --update the direction
IF((b_prev XOR a_new(1)) = '1') THEN --clockwise direction
IF(position < positions-1) THEN --not at position limit
position <= position + 1; --advance position counter
ELSE --at position limit
--position <= 0; --roll over position counter to zero
null;
END IF;
ELSE --counter-clockwise direction
IF(position > 0) THEN --not at position limit
position <= position - 1; --decrement position counter
ELSE --at position limit
--position <= positions-1; --roll over position counter maximum
null;
END IF;
END IF;
END IF;
END IF;
END PROCESS;
END logic;

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@ -21,11 +21,22 @@ module super_breakout_mist(
localparam CONF_STR = {
"S. Breakout;;",
"O1,Test Mode,Off,On;",
"O2,Rotate Controls,Off,On;",
"O34,Scandoubler Fx,None,HQ2x,CRT 25%,CRT 50%;",
"T6,Reset;",
"V,v1.00.",`BUILD_DATE
};
"V,v1.20.",`BUILD_DATE
};
wire clk_24, clk_12, clk_6;
wire locked;
pll pll(
.inclk0(CLOCK_27),
.c0(clk_24),//24.192
.c1(clk_12),//12.096
.c2(clk_6),//6.048
.locked(locked)
);
wire [31:0] status;
wire [1:0] buttons;
wire [1:0] switches;
@ -36,40 +47,98 @@ wire scandoubler_disable;
wire ypbpr;
wire ps2_kbd_clk, ps2_kbd_data;
wire [7:0] audio;
wire video;
//assign LED = 1'b1;
wire clk_24, clk_12, clk_6;
wire locked;
pll pll
(
.inclk0(CLOCK_27),
.c0(clk_24),//24.192
.c1(clk_12),//12.096
.c2(clk_6),//6.048
.locked(locked)
);
wire hs, vs;
wire hb, vb;
wire blankn = ~(hb | vb);
wire video;
mist_io #(
.STRLEN(($size(CONF_STR)>>3)))
mist_io(
.clk_sys (clk_24 ),
.conf_str (CONF_STR ),
.SPI_SCK (SPI_SCK ),
.CONF_DATA0 (CONF_DATA0 ),
.SPI_SS2 (SPI_SS2 ),
.SPI_DO (SPI_DO ),
.SPI_DI (SPI_DI ),
.buttons (buttons ),
.switches (switches ),
.scandoubler_disable(scandoubler_disable),
.ypbpr (ypbpr ),
.ps2_kbd_clk (ps2_kbd_clk ),
.ps2_kbd_data (ps2_kbd_data ),
.joystick_0 (joystick_0 ),
.joystick_1 (joystick_1 ),
.status (status )
);
wire m_up = (kbjoy[3] | joystick_0[3] | joystick_1[3]);
wire m_down = (kbjoy[2] | joystick_0[2] | joystick_1[2]);
wire m_left = (kbjoy[1] | joystick_0[1] | joystick_1[1]);
wire m_right = (kbjoy[0] | joystick_0[0] | joystick_1[0]);
video_mixer #(
.LINE_LENGTH(480),
.HALF_DEPTH(0))
video_mixer(
.clk_sys(clk_24),
.ce_pix(clk_6),
.ce_pix_actual(clk_6),
.SPI_SCK(SPI_SCK),
.SPI_SS3(SPI_SS3),
.SPI_DI(SPI_DI),
.R({6{video}}),
.G({6{video}}),
.B({6{video}}),
// .R(blankn ? {video,video,video,video,video,video} : "000000"),
// .G(blankn ? {video,video,video,video,video,video} : "000000"),
// .B(blankn ? {video,video,video,video,video,video} : "000000"),
.HSync(hs),
.VSync(vs),
.VGA_R(VGA_R),
.VGA_G(VGA_G),
.VGA_B(VGA_B),
.VGA_VS(VGA_VS),
.VGA_HS(VGA_HS),
.rotate({1'b0,status[2]}),//(left/right,on/off)
.scandoubler_disable(scandoubler_disable),
.scanlines(scandoubler_disable ? 2'b00 : {status[4:3] == 3, status[4:3] == 2}),
.hq2x(status[4:3]==1),
.ypbpr_full(1),
.line_start(0),
.mono(1)
);
keyboard keyboard(
.clk(clk_24),
.reset(),
.ps2_kbd_clk(ps2_kbd_clk),
.ps2_kbd_data(ps2_kbd_data),
.joystick(kbjoy)
);
dac dac(
.CLK(clk_24),
.RESET(1'b0),
.DACin(audio),
.DACout(AUDIO_L)
);
assign AUDIO_R = AUDIO_L;
//wire m_up = (kbjoy[3] | joystick_0[3] | joystick_1[3]);
//wire m_down = (kbjoy[2] | joystick_0[2] | joystick_1[2]);
wire m_left = status[2] ? (kbjoy[1] | joystick_0[1] | joystick_1[1]) : (kbjoy[3] | joystick_0[3] | joystick_1[3]);
wire m_right = status[2] ? (kbjoy[0] | joystick_0[0] | joystick_1[0]) : (kbjoy[2] | joystick_0[2] | joystick_1[2]);
wire m_fire = ~(kbjoy[4] | joystick_0[4] | joystick_1[4]);
wire m_start = ~(kbjoy[5] | kbjoy[6]);
wire m_coin = ~(kbjoy[7]);
wire [1:0] steer;
joy2quad steer1
(
joy2quad steer1(
.CLK(clk_24),
.clkdiv('d22500),
.right(m_right),
.left(m_left),
.steer(steer)
);
);
super_breakout super_breakout (
super_breakout super_breakout(
.clk_12(clk_12),
.Reset_n(~(status[0] | status[6] | buttons[1])),
.CompSync_O(),
@ -97,74 +166,4 @@ super_breakout super_breakout (
.Counter_O()
);
dac dac (
.CLK(clk_24),
.RESET(1'b0),
.DACin(audio),
.DACout(AUDIO_L)
);
assign AUDIO_R = AUDIO_L;
wire hs, vs;
wire hb, vb;
wire blankn = ~(hb | vb);
video_mixer #(.LINE_LENGTH(480), .HALF_DEPTH(0)) video_mixer
(
.clk_sys(clk_24),
.ce_pix(clk_6),
.ce_pix_actual(clk_6),
.SPI_SCK(SPI_SCK),
.SPI_SS3(SPI_SS3),
.SPI_DI(SPI_DI),
.R({video,video,video,video,video,video}),
.G({video,video,video,video,video,video}),
.B({video,video,video,video,video,video}),
// .R(blankn ? {video,video,video} : "000"),
// .G(blankn ? {video,video,video} : "000"),
// .B(blankn ? {video,video,video} : "000"),
.HSync(hs),
.VSync(vs),
.VGA_R(VGA_R),
.VGA_G(VGA_G),
.VGA_B(VGA_B),
.VGA_VS(VGA_VS),
.VGA_HS(VGA_HS),
.scandoubler_disable(scandoubler_disable),
.scanlines(scandoubler_disable ? 2'b00 : {status[4:3] == 3, status[4:3] == 2}),
.hq2x(status[4:3]==1),
.ypbpr_full(1),
.line_start(0),
.mono(1)
);
mist_io #(.STRLEN(($size(CONF_STR)>>3))) mist_io
(
.clk_sys (clk_24 ),
.conf_str (CONF_STR ),
.SPI_SCK (SPI_SCK ),
.CONF_DATA0 (CONF_DATA0 ),
.SPI_SS2 (SPI_SS2 ),
.SPI_DO (SPI_DO ),
.SPI_DI (SPI_DI ),
.buttons (buttons ),
.switches (switches ),
.scandoubler_disable(scandoubler_disable),
.ypbpr (ypbpr ),
.ps2_kbd_clk (ps2_kbd_clk ),
.ps2_kbd_data (ps2_kbd_data ),
.joystick_0 (joystick_0 ),
.joystick_1 (joystick_1 ),
.status (status )
);
keyboard keyboard(
.clk(clk_24),
.reset(),
.ps2_kbd_clk(ps2_kbd_clk),
.ps2_kbd_data(ps2_kbd_data),
.joystick(kbjoy)
);
endmodule

View File

@ -60,7 +60,7 @@ module video_mixer
// 0 = 16-240 range. 1 = 0-255 range. (only for YPbPr color space)
input ypbpr_full,
input [1:0] rotate, //[0] - rotate [1] - left or right
// color
input [DWIDTH:0] R,
input [DWIDTH:0] G,
@ -182,6 +182,7 @@ osd #(OSD_X_OFFSET, OSD_Y_OFFSET, OSD_COLOR) osd
.B_in(b_out),
.HSync(hs),
.VSync(vs),
.rotate(rotate),
.R_out(red),
.G_out(green),