mirror of
https://github.com/Gehstock/Mist_FPGA.git
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M72 build also for SiDi (#1)
* Allows also SiDi build from subfolder * SiDi qpf & qsf
This commit is contained in:
Scandy
Gyorgy Szombathelyi
parent
b4d6a95c8f
commit
8c9d403fc9
@ -31,7 +31,7 @@ module IremM72_MiST(
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output SDRAM_CKE
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);
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`include "rtl/build_id.v"
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`include "build_id.v"
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`define CORE_NAME "RTYPE2"
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//`define CORE_NAME "HHARRYU"
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@ -17,7 +17,7 @@ proc generateBuildID_Verilog {} {
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set buildTime [ clock format [ clock seconds ] -format %H%M%S ]
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# Create a Verilog file for output
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set outputFileName "rtl/build_id.v"
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set outputFileName "build_id.v"
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set outputFile [open $outputFileName "w"]
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# Output the Verilog source
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@ -32,4 +32,4 @@ proc generateBuildID_Verilog {} {
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}
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# Comment out this line to prevent the process from automatically executing when the file is sourced:
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generateBuildID_Verilog
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generateBuildID_Verilog
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30
Arcade_MiST/IremM72 Hardware/sidi/IremM72.qpf
Normal file
30
Arcade_MiST/IremM72 Hardware/sidi/IremM72.qpf
Normal file
@ -0,0 +1,30 @@
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# -------------------------------------------------------------------------- #
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#
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# Copyright (C) 1991-2011 Altera Corporation
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# Your use of Altera Corporation's design tools, logic functions
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# and other software and tools, and its AMPP partner logic
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# functions, and any output files from any of the foregoing
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# (including device programming or simulation files), and any
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# associated documentation or information are expressly subject
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# to the terms and conditions of the Altera Program License
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# Subscription Agreement, Altera MegaCore Function License
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# Agreement, or other applicable license agreement, including,
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# without limitation, that your use is for the sole purpose of
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# programming logic devices manufactured by Altera and sold by
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# Altera or its authorized distributors. Please refer to the
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# applicable agreement for further details.
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#
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# -------------------------------------------------------------------------- #
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#
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# Quartus II
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# Version 10.1 Build 197 01/19/2011 Service Pack 1 SJ Full Version
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# Date created = 23:49:02 July 13, 2012
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#
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# -------------------------------------------------------------------------- #
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QUARTUS_VERSION = "10.1"
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DATE = "23:49:02 July 13, 2012"
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# Revisions
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PROJECT_REVISION = "IremM72"
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255
Arcade_MiST/IremM72 Hardware/sidi/IremM72.qsf
Normal file
255
Arcade_MiST/IremM72 Hardware/sidi/IremM72.qsf
Normal file
@ -0,0 +1,255 @@
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set_global_assignment -name FIT_ATTEMPTS_TO_SKIP 0
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# -------------------------------------------------------------------------- #
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#
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# Copyright (C) 1991-2013 Altera Corporation
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# Your use of Altera Corporation's design tools, logic functions
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# and other software and tools, and its AMPP partner logic
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# functions, and any output files from any of the foregoing
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# (including device programming or simulation files), and any
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# associated documentation or information are expressly subject
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# to the terms and conditions of the Altera Program License
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# Subscription Agreement, Altera MegaCore Function License
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# Agreement, or other applicable license agreement, including,
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# without limitation, that your use is for the sole purpose of
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# programming logic devices manufactured by Altera and sold by
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# Altera or its authorized distributors. Please refer to the
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# applicable agreement for further details.
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#
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# -------------------------------------------------------------------------- #
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#
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# Quartus II 64-Bit
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# Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
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# Date created = 21:06:00 February 29, 2020
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#
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# -------------------------------------------------------------------------- #
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#
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# Notes:
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#
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# 1) The default values for assignments are stored in the file:
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# IremM72_MiST_assignment_defaults.qdf
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# If this file doesn't exist, see file:
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# assignment_defaults.qdf
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#
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# 2) Altera recommends that you do not modify this file. This
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# file is updated automatically by the Quartus II software
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# and any changes you make may be lost or overwritten.
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#
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# -------------------------------------------------------------------------- #
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# Project-Wide Assignments
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# ========================
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set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
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set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
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set_global_assignment -name LAST_QUARTUS_VERSION 13.1
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set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:../rtl/build_id.tcl"
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set_global_assignment -name SMART_RECOMPILE ON
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# Pin & Location Assignments
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# ==========================
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set_location_assignment PIN_G1 -to LED
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set_location_assignment PIN_E1 -to CLOCK_27
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set_location_assignment PIN_P16 -to VGA_R[5]
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set_location_assignment PIN_P15 -to VGA_R[4]
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set_location_assignment PIN_R16 -to VGA_R[3]
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set_location_assignment PIN_R14 -to VGA_R[2]
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set_location_assignment PIN_T15 -to VGA_R[1]
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set_location_assignment PIN_T14 -to VGA_R[0]
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set_location_assignment PIN_J16 -to VGA_B[5]
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set_location_assignment PIN_J15 -to VGA_B[4]
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set_location_assignment PIN_J14 -to VGA_B[3]
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set_location_assignment PIN_K16 -to VGA_B[2]
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set_location_assignment PIN_K15 -to VGA_B[1]
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set_location_assignment PIN_J13 -to VGA_B[0]
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set_location_assignment PIN_F16 -to VGA_G[5]
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set_location_assignment PIN_F15 -to VGA_G[4]
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set_location_assignment PIN_L16 -to VGA_G[3]
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set_location_assignment PIN_L15 -to VGA_G[2]
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set_location_assignment PIN_N15 -to VGA_G[1]
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set_location_assignment PIN_N16 -to VGA_G[0]
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set_location_assignment PIN_T10 -to VGA_VS
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set_location_assignment PIN_T11 -to VGA_HS
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set_location_assignment PIN_T12 -to AUDIO_L
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set_location_assignment PIN_T13 -to AUDIO_R
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set_location_assignment PIN_T2 -to SPI_DO
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set_location_assignment PIN_R1 -to SPI_DI
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set_location_assignment PIN_T3 -to SPI_SCK
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set_location_assignment PIN_T4 -to SPI_SS2
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set_location_assignment PIN_G15 -to SPI_SS3
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set_location_assignment PIN_G16 -to SPI_SS4
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set_location_assignment PIN_H2 -to CONF_DATA0
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set_location_assignment PIN_B14 -to SDRAM_A[0]
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set_location_assignment PIN_C14 -to SDRAM_A[1]
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set_location_assignment PIN_C15 -to SDRAM_A[2]
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set_location_assignment PIN_C16 -to SDRAM_A[3]
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set_location_assignment PIN_B16 -to SDRAM_A[4]
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set_location_assignment PIN_A15 -to SDRAM_A[5]
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set_location_assignment PIN_A14 -to SDRAM_A[6]
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set_location_assignment PIN_A13 -to SDRAM_A[7]
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set_location_assignment PIN_A12 -to SDRAM_A[8]
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set_location_assignment PIN_D16 -to SDRAM_A[9]
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set_location_assignment PIN_B13 -to SDRAM_A[10]
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set_location_assignment PIN_D15 -to SDRAM_A[11]
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set_location_assignment PIN_D14 -to SDRAM_A[12]
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set_location_assignment PIN_C3 -to SDRAM_DQ[0]
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set_location_assignment PIN_C2 -to SDRAM_DQ[1]
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set_location_assignment PIN_A4 -to SDRAM_DQ[2]
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set_location_assignment PIN_B4 -to SDRAM_DQ[3]
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set_location_assignment PIN_A6 -to SDRAM_DQ[4]
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set_location_assignment PIN_D6 -to SDRAM_DQ[5]
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set_location_assignment PIN_A7 -to SDRAM_DQ[6]
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set_location_assignment PIN_B7 -to SDRAM_DQ[7]
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set_location_assignment PIN_E6 -to SDRAM_DQ[8]
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set_location_assignment PIN_C6 -to SDRAM_DQ[9]
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set_location_assignment PIN_B6 -to SDRAM_DQ[10]
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set_location_assignment PIN_B5 -to SDRAM_DQ[11]
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set_location_assignment PIN_A5 -to SDRAM_DQ[12]
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set_location_assignment PIN_B3 -to SDRAM_DQ[13]
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set_location_assignment PIN_A3 -to SDRAM_DQ[14]
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set_location_assignment PIN_A2 -to SDRAM_DQ[15]
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set_location_assignment PIN_A11 -to SDRAM_BA[0]
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set_location_assignment PIN_B12 -to SDRAM_BA[1]
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set_location_assignment PIN_C9 -to SDRAM_DQMH
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set_location_assignment PIN_C8 -to SDRAM_DQML
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set_location_assignment PIN_A10 -to SDRAM_nRAS
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set_location_assignment PIN_B10 -to SDRAM_nCAS
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set_location_assignment PIN_D8 -to SDRAM_nWE
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set_location_assignment PIN_B11 -to SDRAM_nCS
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set_location_assignment PIN_C11 -to SDRAM_CKE
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set_location_assignment PIN_R4 -to SDRAM_CLK
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# Classic Timing Assignments
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# ==========================
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set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
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set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
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set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS ON
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# Analysis & Synthesis Assignments
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# ================================
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set_global_assignment -name TOP_LEVEL_ENTITY IremM72_MiST
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set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
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set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
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set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP
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set_global_assignment -name CYCLONEII_OPTIMIZATION_TECHNIQUE BALANCED
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set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS ON
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set_global_assignment -name ALLOW_SYNCH_CTRL_USAGE ON
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set_global_assignment -name VHDL_INPUT_VERSION VHDL_2008
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set_global_assignment -name VHDL_SHOW_LMF_MAPPING_MESSAGES OFF
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# Fitter Assignments
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# ==================
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set_global_assignment -name DEVICE EP4CE22F17C8
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set_global_assignment -name FAMILY "Cyclone IV E"
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set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF
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set_global_assignment -name ENABLE_NCE_PIN OFF
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set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF
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set_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME "PASSIVE SERIAL"
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set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
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set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON
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set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
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set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
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set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
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set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"
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set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO"
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set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
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set_global_assignment -name OPTIMIZE_HOLD_TIMING "ALL PATHS"
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set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING ON
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set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
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# Assembler Assignments
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# =====================
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set_global_assignment -name GENERATE_RBF_FILE ON
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set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
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# SignalTap II Assignments
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# ========================
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set_global_assignment -name ENABLE_SIGNALTAP OFF
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set_global_assignment -name USE_SIGNALTAP_FILE output_files/cpu2.stp
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# Power Estimation Assignments
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# ============================
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set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "NO HEAT SINK WITH STILL AIR"
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set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
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# Advanced I/O Timing Assignments
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# ===============================
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set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
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set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
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set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
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set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
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# -----------------------------
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# start ENTITY(IremM72_MiST)
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# Pin & Location Assignments
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# ==========================
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[*]
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[*]
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_BA[0]
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_BA[1]
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQMH
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQML
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nRAS
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nCAS
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nWE
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nCS
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set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[*]
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[*]
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# Fitter Assignments
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# ==================
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_A[*]
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_DQ[*]
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_BA[*]
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_DQML
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_DQMH
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nRAS
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nCAS
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nWE
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nCS
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_CKE
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_CLK
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_R[*]
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_G[*]
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_B[*]
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_HS
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_VS
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set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to AUDIO_L
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set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to AUDIO_R
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set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SPI_DO
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# start DESIGN_PARTITION(Top)
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# ---------------------------
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# Incremental Compilation Assignments
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# ===================================
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set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
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set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
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set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
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# end DESIGN_PARTITION(Top)
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# -------------------------
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# end ENTITY(IremM72_MiST)
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# ---------------------------
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set_location_assignment PLL_1 -to pll|altpll_component|auto_generated|pll1
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set_global_assignment -name DSP_BLOCK_BALANCING "DSP BLOCKS"
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set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING OFF
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set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION OFF
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set_global_assignment -name AUTO_SHIFT_REGISTER_RECOGNITION AUTO
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set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT EXTRA
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set_global_assignment -name VERILOG_SHOW_LMF_MAPPING_MESSAGES OFF
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set_global_assignment -name SYSTEMVERILOG_FILE ../rtl/IremM72_MiST.sv
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set_global_assignment -name QIP_FILE ../rtl/pll_mist.qip
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set_global_assignment -name QIP_FILE ../rtl/m72.qip
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set_global_assignment -name QIP_FILE ../../../common/mist/mist.qip
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set_global_assignment -name QIP_FILE ../../../common/CPU/T80/T80.qip
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set_global_assignment -name QIP_FILE ../../../common/CPU/v30/V30.qip
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set_global_assignment -name QIP_FILE ../../../common/CPU/MC8051/mc8051.qip
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set_global_assignment -name QIP_FILE ../../../common/Sound/jt51/jt51.qip
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set_global_assignment -name SIGNALTAP_FILE output_files/cpu.stp
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set_global_assignment -name SIGNALTAP_FILE output_files/cpu2.stp
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set_global_assignment -name SIGNALTAP_FILE output_files/cpu3.stp
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set_global_assignment -name AUTO_RESOURCE_SHARING ON
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set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
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