mirror of
https://github.com/Gehstock/Mist_FPGA.git
synced 2026-01-29 21:20:55 +00:00
alternate Lunar Rescue Core
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@@ -44,8 +44,6 @@ output [7:0] audio_s,
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input key_strobe,
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input key_pressed,
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input [7:0] key_code,
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//input PS2_KBCLK,
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//input PS2_KBDAT,
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input [9:0] SWITCH,
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input UART_RXD,
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output UART_TXD
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@@ -966,19 +964,6 @@ end
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always @ (posedge CLK50MHZ) // 50MHz
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KB_CLK <= KB_CLK + 1'b1; // 50/32 = 1.5625 MHz
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/*
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ps2_keyboard KEYBOARD(
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.RESET_N(RESET_N),
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.CLK(KB_CLK[4]),
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.key_strobe (key_strobe ),
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.key_pressed (key_pressed ),
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.key_code (key_code ),
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.PS2_CLK(PS2_KBCLK),
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.PS2_DATA(PS2_KBDAT),
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.RX_SCAN(SCAN),
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.RX_PRESSED(PRESS),
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.RX_EXTENDED(EXTENDED)
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);*/
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assign PRESS_N = ~key_pressed;
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@@ -72,8 +72,6 @@ LASER310_TOP LASER310_TOP(
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.VGA_VS(vs),
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.AUD_ADCDAT(audio),
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.audio_s(audio_s),
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// .PS2_KBCLK(ps2_kbd_clk),
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// .PS2_KBDAT(ps2_kbd_data),
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.key_strobe (key_strobe ),
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.key_pressed (key_pressed ),
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.key_code (key_code ),
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@@ -1,227 +0,0 @@
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/*****************************************************************************
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* gbfpgaapple APPLE ][e core.
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*
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*
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* Ver 1.0
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* July 2006
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* Latest version from gbfpgaapple.tripod.com
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*
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******************************************************************************
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*
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* CPU section copyrighted by Daniel Wallner
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*
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******************************************************************************
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*
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* Apple ][e compatible system on a chip
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*
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* Version : 1.0
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*
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* Copyright (c) 2006 Gary Becker (gary_l_becker@yahoo.com)
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*
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* All rights reserved
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*
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* Redistribution and use in source and synthezised forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* Redistributions in synthesized form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* Neither the name of the author nor the names of other contributors may
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* be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* Please report bugs to the author, but before you do so, please
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* make sure that this is not a derivative work and that
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* you have the latest version of this file.
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*
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* The latest version of this file can be found at:
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* http://gbfpgaapple.tripod.com
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*******************************************************************************/
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`timescale 1 ns / 1 ns
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module ps2_keyboard (
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CLK,
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RESET_N,
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PS2_CLK,
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PS2_DATA,
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RX_PRESSED,
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RX_EXTENDED,
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RX_SCAN
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);
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input CLK;
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input RESET_N;
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input PS2_CLK;
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input PS2_DATA;
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output RX_PRESSED;
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reg RX_PRESSED;
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output RX_EXTENDED;
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reg RX_EXTENDED;
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output [7:0] RX_SCAN;
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reg [7:0] RX_SCAN;
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reg KB_CLK;
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reg KB_DATA;
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reg KB_CLK_B;
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reg KB_DATA_B;
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reg PRESSED_N;
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reg EXTENDED;
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reg [2:0] BIT;
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reg [7:0] STATE;
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reg [7:0] SCAN;
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wire PARITY;
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reg [10:0] TIMER;
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reg KILLER;
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wire RESET_X;
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// Double buffer
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always @ (posedge CLK)
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begin
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KB_CLK_B <= PS2_CLK;
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KB_DATA_B <= PS2_DATA;
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KB_CLK <= KB_CLK_B;
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KB_DATA <= KB_DATA_B;
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end
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assign PARITY = ~(((SCAN[0]^SCAN[1])
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^(SCAN[2]^SCAN[3]))
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^((SCAN[4]^SCAN[5])
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^(SCAN[6]^SCAN[7])));
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assign RESET_X = RESET_N & KILLER;
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always @ (negedge CLK or negedge RESET_N)
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if(!RESET_N)
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begin
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KILLER <= 1'b1;
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TIMER <= 11'h000;
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end
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else
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case(TIMER)
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11'h000:
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begin
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KILLER <= 1'b1;
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if(STATE != 8'h00)
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TIMER <= 11'h001;
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end
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11'h7FD:
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begin
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KILLER <= 1'b0;
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TIMER <= 11'h7FE;
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end
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default:
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if(STATE == 8'h00)
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TIMER <= 11'h000;
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else
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TIMER <= TIMER + 1'b1;
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endcase
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always @ (posedge CLK or negedge RESET_X)
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begin
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if(!RESET_X)
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begin
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STATE <= 8'h00;
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SCAN <= 8'h00;
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BIT <= 3'b000;
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RX_SCAN <= 8'h00;
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RX_PRESSED <= 1'b0;
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PRESSED_N <= 1'b0;
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EXTENDED <= 1'b0;
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end
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else
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begin
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case (STATE)
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8'h00: // Hunt for start bit
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begin
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SCAN <= 8'h00;
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BIT <= 3'b000;
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RX_SCAN <= 8'h00;
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RX_PRESSED <= 1'b0;
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if(~KB_DATA & ~KB_CLK)
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STATE <= 8'h01;
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end
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8'h01: // Started
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begin
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if(KB_CLK)
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STATE <= 8'h02;
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end
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8'h02: // Hunt for Bit
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begin
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if(~KB_CLK)
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STATE <= 8'h03;
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end
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8'h03:
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begin
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if(KB_CLK)
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begin
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SCAN[BIT] <= KB_DATA;
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BIT <= BIT + 1'b1;
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if(BIT == 3'b111)
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STATE <= 8'h04;
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else
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STATE <= 8'h02;
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end
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end
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8'h04: // Hunt for Bit
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begin
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if(~KB_CLK)
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STATE <= 8'h05;
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end
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8'h05: // Test parity
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begin
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if(KB_CLK)
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begin
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if(KB_DATA == PARITY)
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STATE <= 8'h06;
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else
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begin
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STATE <= 8'h00;
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end
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end
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end
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8'h06:
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begin
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if(SCAN == 8'hE0)
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begin
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EXTENDED <= 1'b1;
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STATE <= 8'h00;
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end
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else
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if(SCAN == 8'hF0)
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begin
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PRESSED_N <= 1'b1;
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STATE <= 8'h00;
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end
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else
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begin
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RX_SCAN <= SCAN;
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RX_PRESSED <= ~PRESSED_N;
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RX_EXTENDED <= EXTENDED;
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PRESSED_N <= 1'b0;
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EXTENDED <= 1'b0;
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STATE <= 8'h07;
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end
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end
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8'h07:
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STATE <= 8'h00;
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endcase
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end
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end
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endmodule
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