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mirror of https://github.com/Gehstock/Mist_FPGA.git synced 2026-02-07 00:27:10 +00:00
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Gehstock
2020-05-13 17:33:16 +02:00
parent a34b1d21d8
commit cbf1da5415
2 changed files with 1 additions and 1 deletions

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@@ -1,4 +1,4 @@
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) cpu09l_128a.vhd ]
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) cpu09.vhd ]
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) mc6809.v ]
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) mc6809i.v ]
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) mc6809is.v ]