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https://github.com/Gehstock/Mist_FPGA.git
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Some Cleanup on Victory
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@@ -1,2 +1,2 @@
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`define BUILD_DATE "190517"
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`define BUILD_TIME "155807"
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`define BUILD_DATE "190518"
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`define BUILD_TIME "015429"
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@@ -380,7 +380,7 @@ begin
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V4 => vcnt(2),
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V2 => vcnt(1),
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V1 => vcnt(0),
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FLIP => '0'--control_reg(3)
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FLIP => control_reg(5)
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);
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p_ab_mux_comb : process(hcnt, cpu_addr, vram_addr_ab)
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@@ -463,7 +463,7 @@ begin
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end if;
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wr0_l <= decb(0);--101000 00 100000 1010000 10 000000
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wr1_l <= decb(1);
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wr2_l <= decb(2);
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wr2_l <= decb(2);--spriteram2
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end process;
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p_control_reg : process
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@@ -579,7 +579,7 @@ begin
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--
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I_HBLANK => hblank,
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I_VBLANK => vblank,
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I_FLIP => '0',--control_reg(3),
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I_FLIP => control_reg(5),
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I_WR2_L => wr2_l,
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--
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O_RED => O_VIDEO_R,
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@@ -609,7 +609,7 @@ begin
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--
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I_WR1_L => wr1_l,
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I_WR0_L => wr0_l,
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I_SOUND_ON => '1',--control_reg(1),
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I_SOUND_ON => control_reg(3),
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--
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O_AUDIO => O_AUDIO,
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ENA_6 => ena_6,
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