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8080DF - MIDAS macros to assemble 8080 software.
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src/klh/8080df.21
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252
src/klh/8080df.21
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COMMEN / This file contains the definitions necessary to use MIDAS as a
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fast powerful 8080 assembler. The only idiosyncracy requiring source
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code conversion is the decision not to use hex notation; not only is it
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unlikely that we will ever borrow any 8080 software, such notation is
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quite easy to change in the source and using octal makes life easier for
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people used to DEC equipment./
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; Register Definitions
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A==7 ; Accumulator
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B==0 ; General reg (BC high)
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C==1 ; General reg (BC low)
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D==2 ; General reg (DE high)
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E==3 ; General reg (DE low)
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H==4 ; General & Memory Address reg (HL high)
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L==5 ; General & Memory Address reg (HL low)
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M==6 ; Non-ex reg, defined to indicate Memory reference
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SP==6 ; Stack Pointer, defined here for use as register pair.
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; Instruction Opcode definitions (primarily for DDT symbols)
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; Accumulator Ops
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IRP op,,[ADD,ADC,SUB,SBB,ANA,XRA,ORA,CMP]
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%%.op==200+.irpcnt_3
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IRP reg,,[B,C,D,E,H,L,M,A]
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op!.!reg=<%%.op+.irpcnt>_27.
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TERMIN
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TERMIN
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IRP r1,,[B,C,D,E,H,L,M,A]
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%%.op==100+.irpcnt_3
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IRP r2,,[B,C,D,E,H,L,M,A]
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MOV.!r1!r2=<%%.op+.irpcnt>_27.
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TERMIN
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TERMIN
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; Simple invariant opcodes
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IRP pair,,[[NOP,000],[HLT,166],[DI,363],[EI,373]
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[XCHG,353],[XTHL,343],[SPHL,371],[PCHL,351]
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[SHLD,042],[LHLD,052],[STA,062],[LDA,072]
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[OUT,323],[IN,333]
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[RET,311],[JMP,303],[CALL,315]]
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IRP op,val,[pair]
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op!.=val_27.
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.istop
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TERMIN
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TERMIN
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IRP op,,[RLC,RRC,RAL,RAR,DAA,CMA,STC,CMC]
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op!.=<007+<.irpcnt_3>>_27.
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TERMIN
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IRP op,,[ADI,ACI,SUI,SBI,ANI,XRI,ORI,CPI]
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op!.=<306+<.irpcnt_3>>_27.
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TERMIN
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; Misc - PUSH/POP and RST
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IRP rp,,[B,D,H,P] ; P = PSW
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PUSH.!rp=<305+.irpcnt_4>_27.
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POP.!rp=<301+.irpcnt_4>_27.
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TERMIN
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IRP r,,[0,1,2,3,4,5,6,7]
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RST.!r=<307+<r_3>>_27.
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TERMIN
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; Other Register referencing opcodes
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IRP reg,,[B,C,D,E,H,L,M,A]
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INR.!reg=<004+.irpcnt_3>_27.
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DCR.!reg=<005+.irpcnt_3>_27.
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MVI.!reg=<006+.irpcnt_3>_27.
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TERMIN
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; Register-Pair opcodes
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IRP rp,,[B,D,H,SP]
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LXI.!rp=<001+.irpcnt_4>_27.
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DAD.!rp=<011+.irpcnt_4>_27.
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INX.!rp=<003+.irpcnt_4>_27.
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DCX.!rp=<013+.irpcnt_4>_27.
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TERMIN
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IRP rp,,[B,D]
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LDAX.!rp=<012+.irpcnt_4>_27.
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STAX.!rp=<002+.irpcnt_4>_27.
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TERMIN
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; Conditionals
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IRP cond,,[NZ,Z,NC,C,PO,PE,P,M]
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R!cond!.=<300+.irpcnt_3>_27.
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J!cond!.=<302+.irpcnt_3>_27.
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C!cond!.=<304+.irpcnt_3>_27.
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TERMIN
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; Instruction Macro definitions
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; Define single-byte invariant opcodes
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RLC==RLC. ; Rotate Accumulator Left
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RRC==RRC. ; Rotate Accumulator Right
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RAL==RAL. ; Rotate Accumulator Left
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RAR==RAR. ; Rotate Accumulator Right
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DAA==DAA. ; Decimal Adjust Accumulator
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CMA==CMA. ; Complement Accumulator
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STC==STC. ; Set Carry
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CMC==CMC. ; Complement Carry
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PCHL==PCHL. ; Jump H and L Indirect - move H and L to PC
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SPHL==SPHL. ; Move HL to SP
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XTHL==XTHL. ; Exchange Stack Top with H and L
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XCHG==XCHG. ; Exchange H and L with D and E
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DI==DI. ; Disable Interrupts
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EI==EI. ; Enable Interrupts
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HLT==HLT. ; Halt
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; Define auxiliary stuff for following.
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NOP=400_27. ; "op-code" for No Operation (zeros)
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.LO.=401_27. ; "op-code" indicating lo-order data byte
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.HI.=402_27. ; "op-code" indicating hi-order data byte
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DEFINE %%word val16
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.LO. <<val16>&377> ; low order byte
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.HI. <<val16>_-8.> ; high order byte
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TERMIN
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; Define Direct Addressing instructions - SHLD, LHLD, STA, LDA.
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IRP op,,[SHLD,LHLD,STA,LDA]
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DEFINE op addr
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op!. addr
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%%word [addr]
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TERMIN
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TERMIN
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; Define Single-Register instructions
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IRP op,,[ADD,ADC,SUB,SBB,ANA,XRA,ORA,CMP]
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%%!op==200+<.irpcnt_3> ; .IRPCNT not evaled in macro def
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DEFINE op r
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<%%!op+r>_27.
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TERMIN
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TERMIN
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; Define 2-byte instructions with data
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IRP op,,[ADI,ACI,SUI,SBI,ANI,XRI,ORI,CPI]
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DEFINE op data
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op!. data
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.LO. data&377
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TERMIN
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TERMIN
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; Define JMP and Conditional Jumps
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DEFINE JMP addr ; Jump to Address
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JMP. addr
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%%word [addr]
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TERMIN
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IRP op,,[JNZ,JZ,JNC,JC,JPO,JPE,JP,JM]
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DEFINE op addr
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op!. addr
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%%word [addr]
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TERMIN
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TERMIN
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; Define CALL and Conditional Calls
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DEFINE CALL addr ; Call to Subroutine
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CALL. addr
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%%word [addr]
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TERMIN
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IRP op,,[CNZ,CZ,CNC,CC,CPO,CPE,CP,CM]
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DEFINE op addr
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op!. addr
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%%word [addr]
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TERMIN
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TERMIN
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; Define RET and Conditional Returns
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RET==RET. ; Return from Subroutine
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IRP op,,[RNZ,RZ,RNC,RC,RPO,RPE,RP,RM] ; Order important!
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op==op!.
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TERMIN
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; Define various others individually
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DEFINE MOV r1,r2 ; Move from Register or Memory
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<100+<r1_3>+r2>_27.
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TERMIN
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DEFINE MVI r,data ; Move Immediate
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<006+<r_3>>_27. data
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.LO. data&377
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TERMIN
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DEFINE LXI rp,data ; Load Register Pair Immediate
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<001+<<rp&6>_3>>_27. data
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%%word [data]
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TERMIN
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DEFINE LDAX rp ; Load Accumulator Indirect
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<012+<<rp&6>_3>>_27. ; RP's B and D only, H and SP illegal
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TERMIN
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DEFINE STAX rp ; Store Accumulator Indirect
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<002+<<rp&6>_3>_27. ; RP's B and D only, H and SP illegal
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TERMIN
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DEFINE INX rp ; Increment Register Pair
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<003+<<rp&6>_3>>_27.
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TERMIN
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DEFINE DCX rp ; Decrement Register Pair
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<013+<<rp&6>_3>>_27.
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TERMIN
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DEFINE DAD rp ; Add Register Pair to H and L
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<011+<<rp&6>_3>>_27.
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TERMIN
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DEFINE PUSH rp ; Push Register Pair
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IFSE [rp][PSW] PUSH.P
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.ELSE <305+<<rp&6>_3>>_27.
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TERMIN
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DEFINE POP rp ; Pop Register Pair
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IFSE [rp][PSW] POP.P
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.ELSE <301+<<rp&6>_3>>_27.
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TERMIN
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DEFINE DCR r ; Decrement Register
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<005+<r_3>>_27.
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TERMIN
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DEFINE INR r ; Increment Register
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<004+<r_3>>_27.
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TERMIN
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DEFINE RST n ; Restart
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<307+<n_3>>_27.
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TERMIN
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DEFINE IN port ; Input from Port
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IN. port
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.LO. port&377
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TERMIN
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DEFINE OUT port ; Output to Port
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OUT. port
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.LO. port&377
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TERMIN
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; Assembler Pseudo Definitions
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DEFINE .PAGE ; Ignore this.
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TERMIN
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DEFINE .SPACE num ; Also ignore this - listing formatter.
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TERMIN
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DEFINE .LST ; Listing on.
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.LSTON
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TERMIN
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DEFINE .NLST ; Listing off
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.LSTOFF
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TERMIN
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DEFINE .LOC n ; Like LOC/ORG
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LOC n
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TERMIN
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DEFINE .TXT *chars ; Like ASCII /chars/
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IRPC ch,,[chars]
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.ascvl /ch
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TERMIN
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TERMIN
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DEFINE .TXTZ *chars ; Like ASCIZ /chars/
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.TXT [chars]
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0
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TERMIN
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DEFINE .END ; I wonder if this will work?
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END
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TERMIN
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DEFINE .RADX n ; Set default number radix
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RADIX n
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TERMIN
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DEFINE .BLK nbytes ; Allocate storage
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BLOCK nbytes
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TERMIN
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DEFINE .WORD -line ; Assemble words. (note wholeline dummy)
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IRPW trunc,,[
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line]
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IRP wd,,[trunc]
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377&wd
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wd_-8.
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TERMIN
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TERMIN
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TERMIN
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DEFINE .BYTE -line ; Similar to .WORD
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IRPW trunc,,[
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line]
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IRP wd,,[trunc]
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377&wd
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TERMIN
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TERMIN
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TERMIN
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