github.com/YosysHQ.yosys
1
0
Fork 0
mirror of synced 2026-04-20 03:03:18 +00:00
Code Issues Releases Wiki Activity

opt_expr: with -keepdc disable equality optimization rules that break when ports are sigmapped

Browse Source
This commit is contained in:
Emil J. Tywoniak
2026-03-25 11:50:17 +01:00
parent c416d39ebb
commit 1775bce173
1 changed files with 1 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
passes/opt/opt_expr.cc
View File

@@ -1213,7 +1213,7 @@ skip_fine_alu:
}
}
if (cell->type.in(ID($eq), ID($ne), ID($eqx), ID($nex)))
if (!keepdc && cell->type.in(ID($eq), ID($ne), ID($eqx), ID($nex)))
{
RTLIL::SigSpec a = cell->getPort(ID::A);
RTLIL::SigSpec b = cell->getPort(ID::B);