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Author SHA1 Message Date
whitequark
01e6850bd3 write_cxxrtl: improve writable memory handling. 
This commit reduces space and time overhead for writable memories
to O(write port count) in both cases; implements handling for write
port priorities; and simplifies runtime representation of memories.
 2020-04-09 04:08:36 +00:00
whitequark
fb0270b752 write_cxxrtl: add support for hierarchical designs. 
Hierarchical design simulations are generally much slower, but this
comes with a major increase in flexibility:
 1. Since the `flatten` pass currently does not support flattening
    of designs with processes, this is the only way to simulate such
    designs with cxxrtl.
 2. Support for hierarchy paves way for simulation black boxes,
    which are necessary for e.g. replacing PHYs with C++ code that
    integrates with the host system.
 2020-04-09 04:08:36 +00:00
whitequark
3376dcf37c write_cxxrtl: avoid undefined behavior on out-of-bounds memory access. 
After this commit, if NDEBUG is not defined, out-of-bounds accesses
cause assertion failures for reads and writes. If NDEBUG is defined,
out-of-bounds reads return zeroes, and out-of-bounds writes are
ignored.

This commit also adds support for memories that start with a non-zero
index (`Memory::start_offset` in RTLIL).
 2020-04-09 04:08:36 +00:00
whitequark
5157691f0e write_cxxrtl: statically schedule comb logic and localize wires. 
This results in further massive gains in performance, modest decrease
in compile time, and, for designs without feedback arcs, makes it
possible to run eval() once per clock edge in certain conditions.
 2020-04-09 04:08:36 +00:00
whitequark
d6d7273421 write_cxxrtl: elide wires for results of comb cells used once. 
This results in massive gains in performance, equally massive
reduction in compile time, and improved readability.
 2020-04-09 04:08:36 +00:00
whitequark
d20e971725 write_cxxrtl: new backend. 
This commit adds a basic implementation that isn't very performant
but implements most of the planned features.
 2020-04-09 04:08:36 +00:00
whitequark
42e7e44207 Merge pull request #1857 from whitequark/splitnets-skip-processes 
splitnets: skip modules with processes
 2020-04-09 04:03:30 +00:00
whitequark
f1d9ca1563 Merge pull request #1875 from whitequark/read_ilang-int_overflow 
Improve handling of integer literals in RTLIL frontend
 2020-04-09 04:02:57 +00:00
whitequark
570f43ec91 Merge pull request #1886 from boqwxp/cleanup_connect 
Clean up `passes/cmds/connect.cc`.
 2020-04-09 03:58:07 +00:00
Alberto Gonzalez
64a5936bd7 Clean up passes/cmds/connect.cc. 2020-04-08 22:11:06 +00:00
Xiretza
5f649fc19d Add constids.inc to final install 
If this is not present in the install, #include-ing most yosys
headers will fail in rtlil.h:380.
 2020-04-08 21:36:33 +02:00
Eddie Hung
5d18fdadfe Merge pull request #1881 from hzeller/only-define-stdc-format-macros-if-not-already 
aigerparse: only define __STDC_FORMAT_MACROS it not already before.
 2020-04-07 13:56:40 -07:00
Henner Zeller
c15040c218 aigerparse: only define __STDC_FORMAT_MACROS it not already before. 2020-04-07 12:50:31 -07:00
Claire Wolf
40223eaee1 Merge pull request #1814 from YosysHQ/mmicko/pyosys_makefile 
Enable ENABLE_LIBYOSYS when ENABLE_PYOSYS is set (closes #1813)
 2020-04-07 17:06:47 +02:00
whitequark
b350398c04 Merge pull request #1874 from boqwxp/cleanup_show 
Clean up `passes/cmds/show.cc`.
 2020-04-06 18:32:20 +00:00
whitequark
8ca12e0c42 Merge pull request #1861 from boqwxp/cleanup_hierarchy_submod 
Clean up `passes/hierarchy/submod.cc`.
 2020-04-06 18:32:10 +00:00
whitequark
b494d4c656 read_ilang: improve style. NFC. 
Co-Authored-By: Alberto Gonzalez <61295559+boqwxp@users.noreply.github.com>
 2020-04-06 18:31:15 +00:00
Alberto Gonzalez
f4346a0400 Use more descriptive variable name. 
Co-Authored-By: whitequark <whitequark@whitequark.org>
 2020-04-06 14:48:27 +00:00
Alberto Gonzalez
d6de14a0d6 Use more descriptive variable name. 
Co-Authored-By: whitequark <whitequark@whitequark.org>
 2020-04-06 14:37:07 +00:00
whitequark
ebf23cd62e Merge pull request #1870 from boqwxp/cleanup_setattr 
Clean up `passes/cmds/setattr.cc`.
 2020-04-06 11:04:49 +00:00
whitequark
df95dc7d4a Merge pull request #1872 from boqwxp/cleanup_copy 
Clean up private member usage in `passes/cmds/copy.cc`.
 2020-04-06 11:03:46 +00:00
whitequark
41f0c38478 Merge pull request #1871 from boqwxp/cleanup_splice 
Clean up `passes/cmds/splice.cc`.
 2020-04-06 11:03:34 +00:00
whitequark
db66371915 Merge pull request #1869 from boqwxp/cleanup_connwrappers 
Clean up `passes/cmds/connwrappers.cc`.
 2020-04-06 11:01:44 +00:00
whitequark
30934e425d Merge pull request #1868 from boqwxp/cleanup_delete 
Clean up `passes/cmds/delete.cc`.
 2020-04-06 10:58:38 +00:00
whitequark
d3615ee445 Merge pull request #1867 from boqwxp/cleanup_stat 
Clean up `passes/cmds/stat.cc`.
 2020-04-06 10:58:02 +00:00
whitequark
75d39c6fdf Merge pull request #1866 from boqwxp/cleanup_test_autotb 
Clean up `passes/tests/test_autotb.cc`.
 2020-04-06 10:56:45 +00:00
whitequark
79c6149069 Merge pull request #1865 from boqwxp/cleanup_dfflibmap 
Clean up `passes/techmap/dfflibmap.cc`.
 2020-04-06 10:56:22 +00:00
whitequark
8340660518 Merge pull request #1863 from boqwxp/cleanup_techmap_extract 
Clean up `passes/techmap/extract.cc`.
 2020-04-06 10:55:50 +00:00
whitequark
0d69d532e0 Merge pull request #1859 from boqwxp/design_duplicate 
Add `-push-copy` option to the `design` command.
 2020-04-06 10:39:26 +00:00
whitequark
d22888ce74 read_ilang: improve error message for overly long wires. 
Fixes #1838.
 2020-04-06 10:33:02 +00:00
whitequark
ca70a1049f read_ilang: detect overflow of integer literals. 2020-04-06 10:32:02 +00:00
whitequark
df69febb1e Merge pull request #1873 from boqwxp/cleanup_bugpoint 
Clean up private member usage in `passes/cmds/bugpoint.cc`.
 2020-04-06 10:13:06 +00:00
Alberto Gonzalez
57f48f94c2 Clean up passes/cmds/show.cc. 2020-04-06 08:51:25 +00:00
Alberto Gonzalez
fdeeb48e62 Clean up private member usage in passes/cmds/bugpoint.cc. 2020-04-06 08:35:09 +00:00
Alberto Gonzalez
2dd09ab611 Clean up private member usage in passes/cmds/copy.cc. 2020-04-06 08:26:10 +00:00
Alberto Gonzalez
5e9c88501e Clean up passes/cmds/splice.cc. 2020-04-06 07:42:46 +00:00
Alberto Gonzalez
2e27ddd511 Clean up passes/cmds/setattr.cc. 2020-04-06 06:52:18 +00:00
Alberto Gonzalez
968230261f Clean up passes/cmds/connwrappers.cc. 2020-04-06 06:11:25 +00:00
Alberto Gonzalez
1226d41c61 Clean up passes/cmds/delete.cc. 2020-04-06 05:09:43 +00:00
Alberto Gonzalez
b39a0d77ab Clean up passes/cmds/stat.cc. 2020-04-06 04:39:18 +00:00
Alberto Gonzalez
438d2e0025 Clean up passes/tests/test_autotb.cc. 2020-04-06 04:25:21 +00:00
Alberto Gonzalez
f3e282a97c Clean up passes/techmap/dfflibmap.cc. 2020-04-06 03:02:40 +00:00
Alberto Gonzalez
64a32ead38 Clean up passes/techmap/extract.cc. 2020-04-05 19:36:23 +00:00
Alberto Gonzalez
5431ce694c Clean up passes/hierarchy/submod.cc. 2020-04-05 04:39:54 +00:00
Alberto Gonzalez
a0416fe167 Rename -duplicate to -push-copy. 
Co-Authored-By: whitequark <whitequark@whitequark.org>
 2020-04-04 21:26:11 +00:00
Eddie Hung
d61a6b81fc Merge pull request #1648 from YosysHQ/eddie/cmp2lcu 
"techmap -map +/cmp2lcu.v" for decomposing arithmetic compares to $lcu
 2020-04-03 16:28:25 -07:00
Eddie Hung
7b38cde2df cmp2lcu: rename _90_lcu_cmp -> _80_lcu_cmp 2020-04-03 14:28:22 -07:00
Eddie Hung
7b09a20c0c cmp2lcu: fail if `LUT_WIDTH < 2 2020-04-03 14:28:22 -07:00
Eddie Hung
34c9b83854 synth: only techmap cmp2{lut,lcu} if -lut 2020-04-03 14:28:22 -07:00
Eddie Hung
5b87720b16 synth: use +/cmp2lcu.v in generic 'synth' too 2020-04-03 14:28:22 -07:00