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5 Commits

Author SHA1 Message Date
Miodrag Milanovic
3e9449cb0b make note that it is for latch mode 2019-09-18 17:48:16 +02:00
Miodrag Milanovic
b0ca6de472 better lut handling 2019-09-18 17:45:19 +02:00
Miodrag Milanovic
3487b95224 Added simulation models for Efinix and Anlogic 2019-09-15 09:37:16 +02:00
Miodrag Milanovic
0de328da8f Fixed Anlogic simulation model 2019-01-25 19:25:25 +01:00
Miodrag Milanovic
83bce9f59c Initial support for Anlogic FPGA 2018-12-01 18:28:54 +01:00