Eddie Hung
dabeb1e8a1
techmap: prefix special wires with backslash for use as IdString
2020-05-14 20:06:55 +00:00
Alberto Gonzalez
bd54d67ad4
Further clean up passes/techmap/techmap.cc.
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Co-Authored-By: Eddie Hung <eddie@fpgeh.com >
2020-05-14 20:06:54 +00:00
Alberto Gonzalez
982562ff13
Use emplace() for more efficient insertion into various dicts.
2020-05-14 20:06:54 +00:00
Alberto Gonzalez
c658d9d59d
Build constant bits directly rather than constructing an object and copying its bits.
2020-05-14 20:06:54 +00:00
Alberto Gonzalez
f235f212ea
Replace std::set with pool for cell_to_inbit and outbit_to_cell.
2020-05-14 20:06:54 +00:00
Alberto Gonzalez
6294621825
Use emplace() rather than insert().
2020-05-14 20:06:54 +00:00
Alberto Gonzalez
dfcb936cd5
Clean up pseudo-private member usage and ensure range iteration uses references where possible to avoid unnecessary copies.
2020-05-14 20:06:54 +00:00
Alberto Gonzalez
a4755c50c3
Clean up extraneous buffer.
2020-05-14 20:06:54 +00:00
Alberto Gonzalez
7857782575
Replace std::map with dict for unique_bit_id.
2020-05-14 20:06:54 +00:00
Alberto Gonzalez
6d64d768b0
Replace std::map with dict for port_new2old_map, port_connmap, and cellbits_to_tplbits.
2020-05-14 20:06:54 +00:00
Alberto Gonzalez
5cb4ae4666
Replace std::map with dict for connbits_map, cell_to_inbit, and outbit_to_cell.
2020-05-14 20:06:54 +00:00
Alberto Gonzalez
c43017fc08
Replace std::map with dict for TechmapWires type.
2020-05-14 20:06:54 +00:00
Alberto Gonzalez
644e55b3d3
Replace std::map with dict for celltypeMap.
2020-05-14 20:06:53 +00:00
Alberto Gonzalez
67f4046c05
Replace std::set with pool for handled_cells and techmap_wire_names.
2020-05-14 20:06:53 +00:00
Alberto Gonzalez
64c16f8c13
Replace std::map with dict for positional_ports.
2020-05-14 20:06:53 +00:00
Alberto Gonzalez
2fb4931e5b
Add specialized hash() for type dict and use a dict instead of a std::map for techmap_cache and techmap_do_cache.
2020-05-14 20:06:53 +00:00
Alberto Gonzalez
437f3fb342
Replace std::map with dict for simplemap_mappers.
2020-05-14 20:06:53 +00:00
Alberto Gonzalez
99b586b283
Use nullptr instead of NULL in passes/techmap/techmap.cc.
2020-05-14 20:06:53 +00:00
Alberto Gonzalez
5f7f213c7f
Replace std::string and RTLIL::IdString with IdString in passes/techmap/techmap.cc.
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Co-Authored-By: Eddie Hung <eddie@fpgeh.com >
2020-05-14 20:06:53 +00:00
Alberto Gonzalez
e49fdee404
Do not modify design modules while iterating over modules().
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Co-Authored-By: Eddie Hung <eddie@fpgeh.com >
2020-05-14 20:06:53 +00:00
Alberto Gonzalez
985a29ff3b
Clean up pseudo-private member usage, superfluous std::vector instantiation, and RTLIL::id2cstr() usage in passes/techmap/techmap.cc.
2020-05-14 20:06:53 +00:00
Eddie Hung
843201ec96
techmap: fix error message
2020-04-14 08:17:02 -07:00
Eddie Hung
956ecd48f7
kernel: big fat patch to use more ID::*, otherwise ID(*)
2020-04-02 09:51:32 -07:00
Eddie Hung
37f42fe102
Merge pull request #1845 from YosysHQ/eddie/kernel_speedup
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kernel: speedup by using more pass-by-const-ref
2020-04-02 07:13:33 -07:00
Marcin Kościelnicki
c2bf11e42a
techmap: Fix cell names with _TECHMAP_REPLACE_.*
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Fixes #1804 .
2020-03-23 11:17:07 +01:00
Eddie Hung
432a09af80
kernel: SigSpec use more const& + overloads to prevent implicit SigSpec
2020-03-13 08:17:39 -07:00
Eddie Hung
265a655ef9
Also rename cells with _TECHMAP_REPLACE_. prefix, as per @cliffordwolf
2019-10-02 12:43:35 -07:00
Eddie Hung
edc3780723
techmap wires named _TECHMAP_REPLACE_.<identifier> to create alias
2019-09-30 17:20:12 -07:00
Marcin Kościelnicki
fd0e3a2c43
Fix _TECHMAP_REMOVEINIT_ handling.
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Previously, this wire was handled in the code that populated the "do or
do not" techmap cache, resulting in init value removal being performed
only for the first use of a given template.
Fixes the problem identified in #1396 .
2019-09-27 18:34:12 +02:00
Eddie Hung
72ce06909e
Trim mismatched connection to be same (smallest) size
2019-09-20 17:51:36 -07:00
Eddie Hung
567e5f0aa7
Fix first testcase in #1391
2019-09-20 17:51:27 -07:00
Clifford Wolf
b76fac3ac3
Add techmap_autopurge attribute, fixes #1381
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Signed-off-by: Clifford Wolf <clifford@clifford.at >
2019-09-19 20:00:52 +02:00
Marcin Kościelnicki
a82e8df7d3
techmap: Add support for extracting init values of ports
2019-09-07 16:30:43 +02:00
Clifford Wolf
30f1ac7ce9
Rename conflicting wires on flatten/techmap, add "hierconn" attribute, fixes #1220
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Signed-off-by: Clifford Wolf <clifford@clifford.at >
2019-09-05 13:51:53 +02:00
Clifford Wolf
694a8f75cf
Add flatten handling of pre-existing wires as created by interfaces, fixes #1145
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Signed-off-by: Clifford Wolf <clifford@clifford.at >
2019-09-05 13:30:58 +02:00
Eddie Hung
fe61dcce8b
Grammar
2019-08-20 20:05:51 -07:00
Eddie Hung
193eae0c84
techmap -max_iter to apply to each module individually
2019-08-20 19:50:20 -07:00
Eddie Hung
eae5a6b12c
Use ID::keep more liberally too
2019-08-15 14:51:12 -07:00
Eddie Hung
52355f5185
Use more ID::{A,B,Y,blackbox,whitebox}
2019-08-15 14:50:10 -07:00
Eddie Hung
02dead2e60
ID(\\.*) -> ID(.*)
2019-08-15 10:25:54 -07:00
Eddie Hung
78ba8b8574
Transform all "\\*" identifiers into ID()
2019-08-15 10:19:29 -07:00
Eddie Hung
9f98241010
Transform "$.*" to ID("$.*") in passes/techmap
2019-08-15 10:05:08 -07:00
Eddie Hung
4cfefae21e
More use of IdString::in()
2019-08-15 09:23:57 -07:00
Eddie Hung
6d77236f38
substr() -> compare()
2019-08-07 12:20:08 -07:00
Eddie Hung
48d0f99406
stoi -> atoi
2019-08-07 11:09:17 -07:00
Eddie Hung
c11ad24fd7
Use std::stoi instead of atoi(<str>.c_str())
2019-08-06 16:45:48 -07:00
Eddie Hung
c2db70f41e
Increment _TECHMAP_BITS_CONNMAP_ by one since counting from zero
2019-07-09 12:14:00 -07:00
Clifford Wolf
e158ea2097
Add log_debug() framework
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Signed-off-by: Clifford Wolf <clifford@clifford.at >
2019-04-22 17:25:52 +02:00
Clifford Wolf
7b35d57592
Disable blackbox detection in techmap files
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Signed-off-by: Clifford Wolf <clifford@clifford.at >
2019-04-22 02:07:36 +02:00
Clifford Wolf
f3ad8d680a
Add "techmap -wb", use in formal flows
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Signed-off-by: Clifford Wolf <clifford@clifford.at >
2019-04-20 11:23:24 +02:00
