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Commit Graph

  • c5d096b7b8 Merge pull request #5308 from YosysHQ/emil/opt_muxtree-refactor Emil J 2025-08-25 16:48:01 +02:00
  • b45e5854bf opt_muxtree: comment wording Emil J. Tywoniak 2025-08-25 16:36:07 +02:00
  • 2163b3ebe4 Merge pull request #5313 from rocallahan/hash-ref Emil J 2025-08-25 16:31:36 +02:00
  • c7e6275d0d Merge pull request #5045 from danderson/push-nwpulrqymkqp Miodrag Milanović 2025-08-25 15:28:34 +02:00
  • a67a3ca49c Merge pull request #4497 from YosysHQ/emil/bitpattern-comments Emil J 2025-08-25 15:25:37 +02:00
  • dd5cc66b95 Merge branch 'Jiahui17-bugfix/remove-hardcoded-soname' Miodrag Milanovic 2025-08-25 07:47:01 +02:00
  • 9f0904d048 Makefile: fix hardcoded -install_name for libyosys.so Miodrag Milanovic 2025-08-25 07:46:34 +02:00
  • c6b8f0eed7 Merge branch 'bugfix/remove-hardcoded-soname' of github.com:Jiahui17/yosys into Jiahui17-bugfix/remove-hardcoded-soname Miodrag Milanovic 2025-08-25 07:45:26 +02:00
  • b5aa3ab9f7 hash_ops should take all parameters by reference instead of requiring copies of vectors, tuples etc Robert O'Callahan 2025-08-25 03:09:04 +00:00
  • 6fdcdd41de Bump version github-actions[bot] 2025-08-22 00:23:32 +00:00
  • 65109822b4 Merge pull request #5305 from rocallahan/opt-merge-perf Emil J 2025-08-21 17:58:55 +02:00
  • 4dea774171 opt_muxtree: refactor Emil J. Tywoniak 2025-08-18 17:22:47 +02:00
  • d10190606c verilog: Lower required bison version to 3.6 Ethan Mahintorabi 2025-08-20 22:58:51 +00:00
  • 7f0130efce verilog: Fix missing sstream include Ethan Mahintorabi 2025-08-20 22:56:26 +00:00
  • 4926e846f6 Bump version github-actions[bot] 2025-08-21 00:22:37 +00:00
  • 8c04e5266c Use commutative hashing instead of expensive allocation and sorting Robert O'Callahan 2025-08-19 05:09:16 +00:00
  • 7d0ea0d64f Refactor call to sorted_pmux_in to avoid copying the connection dictionary Robert O'Callahan 2025-08-19 05:41:08 +00:00
  • 025d7a5641 Merge pull request #5290 from rocallahan/opt-mux-perf Emil J 2025-08-20 20:00:26 +02:00
  • c9ad7b7ad0 Merge pull request #5284 from jix/fix_5282 Jannis Harder 2025-08-20 14:27:19 +02:00
  • ba8af7ad8f Merge pull request #5302 from rocallahan/commutative-hash Emil J 2025-08-20 10:43:00 +02:00
  • 01de9fb453 hashlib: extend unit test with subset collisions, shorten runtime Emil J. Tywoniak 2025-08-19 16:35:34 +02:00
  • 3a5742ffd2 Improve commutative hashing. Robert O'Callahan 2025-08-19 03:21:54 +00:00
  • e1276560cd opt_dff: add another test Anhijkt 2025-08-19 23:48:45 +03:00
  • b0d709f6cf Merge pull request #5294 from rocallahan/precision-tests Emil J 2025-08-19 16:42:49 +02:00
  • 5fd9f54482 Merge pull request #5300 from donn/wheel_fixes Miodrag Milanović 2025-08-19 11:44:12 +02:00
  • 3ca2b7951f memlib: Fix ubsan Krystine Sherwin 2025-08-19 17:05:51 +12:00
  • bfc9a322e2 Bump version github-actions[bot] 2025-08-19 00:24:35 +00:00
  • 1cdf058df4 ci: Fix iverilog version caching Krystine Sherwin 2025-08-19 11:02:34 +12:00
  • 94d07872e6 test-sanitizers.yml: Build in-tree Krystine Sherwin 2025-08-19 11:12:11 +12:00
  • d63f43acf0 ci: iverilog before yosys Krystine Sherwin 2025-08-19 10:46:02 +12:00
  • b42be1df80 ci: Fix test-cells Krystine Sherwin 2025-08-19 10:40:42 +12:00
  • eb773ce071 Reapply "Workflow adjustments" Krystine Sherwin 2025-08-19 11:29:53 +12:00
  • 2ed7a7aac9 wheels: fix PATH variables Mohamed Gaber 2025-08-19 01:28:46 +03:00
  • 6b94376daf Merge pull request #5299 from YosysHQ/revert-5280-krys/ci_changes Jannis Harder 2025-08-18 21:50:19 +02:00
  • 6cbd44daa5 wheels: bison 3.8 on almalinux + memory pressure easing Mohamed Gaber 2025-08-18 22:34:15 +03:00
  • b640a16b07 Revert "Workflow adjustments" Jannis Harder 2025-08-18 20:39:00 +02:00
  • 7ee62c832b bitpattern: unit test Emil J. Tywoniak 2025-08-18 19:50:43 +02:00
  • 6a2984540b bitpattern: comments Emil J. Tywoniak 2024-07-18 15:48:52 +02:00
  • 7c409e2d5a Merge pull request #5285 from jix/abstract_initstates Jannis Harder 2025-08-18 15:39:09 +02:00
  • e0e70d1158 Remove some c_str() calls where they're no longer needed as parameters to stringf(). Robert O'Callahan 2025-08-18 03:07:45 +00:00
  • f0ccc65820 Merge pull request #5297 from rocallahan/redundant-assignmap Emil J 2025-08-18 10:43:44 +02:00
  • 1a52a714b4 Merge pull request #5280 from YosysHQ/krys/ci_changes Miodrag Milanović 2025-08-18 10:17:12 +02:00
  • d73cd78001 Bump version github-actions[bot] 2025-08-18 00:27:23 +00:00
  • 3f2c4f6f83 Remove redundant construction of assign_map. Robert O'Callahan 2025-08-17 23:34:11 +00:00
  • 6d55ca204b Merge pull request #5281 from suisseWalter/add_parameterised_cells_stat KrystalDelusion 2025-08-18 09:21:45 +12:00
  • 9278bed853 removed copyright notice on lib file. Should be covered by the yosys license not anything else. clemens 2025-08-14 16:33:59 +02:00
  • 4e45b5e1bb permit trailing comma clemens 2025-08-14 11:13:40 +02:00
  • 73d1177665 testcases one testcase for single parameter cells. one testcase for double parameter cells. clemens 2025-08-14 09:57:44 +02:00
  • 8b1f77ebd2 cleanup. printf to errors or warnings clemens 2025-08-13 15:16:15 +02:00
  • 50fe9dd7f2 clean parsing code clemens 2025-08-12 09:37:55 +02:00
  • 5fc0e77c3d add functionality to be able to use parameterised cells. clemens 2025-08-12 08:56:05 +02:00
  • d8fb4da437 updated testcase clemens 2025-08-16 09:32:08 +02:00
  • a6e0ab5ea5 Update (sequential) area to be only local without -hierarchy clemens 2025-08-16 09:09:57 +02:00
  • f5b219f59e Update passes/cmds/stat.cc suisseWalter 2025-08-16 08:36:06 +02:00
  • d10fdc0ec5 Bump version github-actions[bot] 2025-08-16 00:24:02 +00:00
  • 7799c6e6ac Merge pull request #5291 from YosysHQ/krys/rename_escape KrystalDelusion 2025-08-16 12:19:49 +12:00
  • e906ea3f1b Add tests for dynamic precision and with with an int parameter Robert O'Callahan 2025-08-15 23:58:58 +00:00
  • 4a324e1da8 Merge pull request #5292 from rocallahan/wasm-varargs KrystalDelusion 2025-08-16 10:29:36 +12:00
  • 70600bb596 Merge pull request #5239 from rocallahan/abc-incremental Emil J 2025-08-15 20:17:32 +02:00
  • 39027dd374 fixup! check: add bufnorm invariant check emil/bufnorm-jix-refactor Emil J. Tywoniak 2025-08-15 11:16:57 +02:00
  • 8384460b4b check: add bufnorm invariant check Emil J. Tywoniak 2025-08-15 11:14:02 +02:00
  • be956f3416 fixup! refactor Emil J. Tywoniak 2025-08-15 11:13:45 +02:00
  • 436d698525 refactor Emil J. Tywoniak 2025-08-14 23:34:03 +02:00
  • 6d62a1fff7 Fix vararg alignment Robert O'Callahan 2025-08-15 05:43:53 +00:00
  • bf625951d7 Bump version github-actions[bot] 2025-08-15 00:26:03 +00:00
  • dd88423334 Make OptMuxtree int-indexed vectors into hashtables Robert O'Callahan 2025-08-13 21:22:45 +00:00
  • ec18d1aede rename.cc: Fixup ports after -unescape Krystine Sherwin 2025-08-15 10:48:32 +12:00
  • 62c441107d Build FfInitVals for the entire module once and use it for every ABC run. Robert O'Callahan 2025-08-05 22:21:30 +00:00
  • 2654bd5355 Compute is_port in AbcPass without iterating through all cells and wires in the module every time we run ABC. Robert O'Callahan 2025-07-27 23:44:41 +00:00
  • ac8259b02e Preserve assign_map across ABC invocations. Robert O'Callahan 2025-07-17 06:16:54 +00:00
  • 4de3ee093e Mark kept FF output wires as ports directly instead of via the 'keep' attribute Robert O'Callahan 2025-07-26 09:34:37 +00:00
  • 741e088e3a bufnorm: fix priority when connecting new driver to existing inout wire Jannis Harder 2025-08-14 21:26:05 +02:00
  • 1770a7a11b bufnorm: don't require normalizing $connect's A port Jannis Harder 2025-08-14 17:38:24 +02:00
  • 4b57de01ea fixup! HACK to unconditionally debug bufnorm drivers in show output Jannis Harder 2025-08-14 17:18:51 +02:00
  • 195d3ef940 Merge pull request #5100 from jix/rename_move_to_cell Emil J 2025-08-14 16:45:33 +02:00
  • efb08dcdc2 HACK to unconditionally debug bufnorm drivers in show output Jannis Harder 2025-08-14 16:19:42 +02:00
  • 4de384d776 WIP prototype bidir aware kernel bufnorm code Jannis Harder 2025-08-14 16:16:19 +02:00
  • 727dabba95 fixup! WIP add placeholder $connect cell Jannis Harder 2025-08-14 16:15:28 +02:00
  • b394629e3f kernel: Add RTLIL::PortDir for a combined input and output flag Jannis Harder 2025-08-14 16:13:43 +02:00
  • 9f62dd6e0e WIP add placeholder $connect cell Jannis Harder 2025-08-14 16:12:53 +02:00
  • 1dbf2df983 Add libfl-dev for CodeQL CI job Miodrag Milanovic 2025-08-14 09:15:43 +02:00
  • a265b23ac0 Bump version github-actions[bot] 2025-08-14 00:25:16 +00:00
  • e486994f60 opt_dff: add test Anhijkt 2025-08-14 00:13:23 +03:00
  • 71307b4a51 add Testcases Fix existing testcases Fix edgecase where modules where counted as cells. clemens 2025-08-13 14:46:01 +02:00
  • dbb977aa8b Merge pull request #5288 from YosysHQ/emil/demote-verilog-parser-errors-again Emil J 2025-08-13 12:52:50 +02:00
  • 856fc43a87 rename: format vector slices consistently with HDL upto/downto direction Emil J. Tywoniak 2025-06-04 11:18:38 +02:00
  • 77089a8d03 rename: add -move-to-cell option in -wire mode Jannis Harder 2025-05-07 12:22:37 +02:00
  • 1603828b30 verilog_parser: fix locations of warnings for restrict keyword Emil J. Tywoniak 2025-08-13 10:56:48 +02:00
  • 910ff3ff36 verilog: demote some parser errors to warnings again Emil J. Tywoniak 2025-08-13 10:54:47 +02:00
  • 383d11c2ac fix design overview in json. clemens 2025-08-13 10:09:02 +02:00
  • 1eb8844e38 fix labeling in report fix design hierarchy containing wrong values. remove left over debug print. clemens 2025-08-13 08:36:26 +02:00
  • ccb23ffc1a Fix indentation Robert O'Callahan 2025-07-15 04:19:09 +00:00
  • 885bb744e3 Make module a parameter of the function so we can change its constness in context Robert O'Callahan 2025-07-15 04:17:48 +00:00
  • 53c72c0d39 Move code in abc_module() that modifies the design into a new function extract() Robert O'Callahan 2025-07-15 03:54:41 +00:00
  • ceedcecfae Move the input parameters to abc_module that are identical across modules to an AbcConfig struct. Robert O'Callahan 2025-07-15 03:38:54 +00:00
  • 4ba42c4752 Move ABC pass state to a struct instead of storing it in global variables. Robert O'Callahan 2025-07-15 01:26:24 +00:00
  • 8634d83320 Bump version github-actions[bot] 2025-08-13 00:25:15 +00:00
  • b3ca5ee0f1 opt_dff: fix timeout issue Anhijkt 2025-08-13 01:48:59 +03:00
  • 1f876f3a22 abstract: Add -initstates option Jannis Harder 2025-08-12 15:26:36 +02:00
  • 256aa3e389 check: Limit detailed cell edge checking for $pmux and $bmux Jannis Harder 2025-08-12 14:38:20 +02:00