github.com/YosysHQ.yosys
1
0
Fork 0
mirror of synced 2026-04-29 05:16:49 +00:00
Code Issues Releases Wiki Activity
Files
f29f4e7c838b7c8bb965aca1c0acdcec8edfaa4a
YosysHQ.yosys/techlibs/common/simlib.v
Clifford Wolf ba43cf5807 Fixed simlib entries for $memrd and $memwr
2014-12-30 13:33:29 +01:00

32 KiB
Raw Blame History

View Raw
Reference in New Issue View Git Blame Copy Permalink