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40
emu/mmregs.h
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40
emu/mmregs.h
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/* Memory map */
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enum
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{
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/* Core and Fast memory */
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MM_MEMIF_BASE = 0,
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MM_MEMIF_ADDR = MM_MEMIF_BASE+0,
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MM_MEMIF_LOW = MM_MEMIF_BASE+1,
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MM_MEMIF_HIGH = MM_MEMIF_BASE+2,
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/* APR */
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MM_APR_BASE = 010,
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MM_APR_CTL1_DN = MM_APR_BASE+0,
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MM_APR_CTL1_UP = MM_APR_BASE+1,
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MM_APR_CTL2_DN = MM_APR_BASE+2,
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MM_APR_CTL2_UP = MM_APR_BASE+3,
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MM_APR_MAINT_UP = MM_APR_BASE+4,
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MM_APR_MAINT_DN = MM_APR_BASE+5,
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MM_APR_DSLT = MM_APR_BASE+6,
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MM_APR_DSRT = MM_APR_BASE+7,
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MM_APR_MAS = MM_APR_BASE+010,
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MM_APR_REPEAT = MM_APR_BASE+011,
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MM_APR_IR = MM_APR_BASE+012,
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MM_APR_MILT = MM_APR_BASE+013,
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MM_APR_MIRT = MM_APR_BASE+014,
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MM_APR_PC = MM_APR_BASE+015,
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MM_APR_MA = MM_APR_BASE+016,
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MM_APR_PI = MM_APR_BASE+017,
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MM_APR_MBLT = MM_APR_BASE+020,
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MM_APR_MBRT = MM_APR_BASE+021,
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MM_APR_ARLT = MM_APR_BASE+022,
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MM_APR_ARRT = MM_APR_BASE+023,
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MM_APR_MQLT = MM_APR_BASE+024,
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MM_APR_MQRT = MM_APR_BASE+025,
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MM_APR_FF1 = MM_APR_BASE+026,
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MM_APR_FF2 = MM_APR_BASE+027,
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MM_APR_FF3 = MM_APR_BASE+030,
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MM_APR_FF4 = MM_APR_BASE+031,
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MM_APR_MMU = MM_APR_BASE+032,
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// TODO: more
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};
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