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Buffer divide final formatting
Add an extra cycle to the divider that buffers the final formatting. Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
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@ -71,14 +71,15 @@ class SimpleDivider(val bits: Int) extends Module {
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overflow := quotient(63, 31).orR
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}
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io.out.bits := quotient
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val result = WireDefault(quotient)
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when (overflow) {
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io.out.bits := 0.U
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result := 0.U
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} .elsewhen (is32bit && !modulus) {
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io.out.bits := 0.U(32.W) ## quotient(31, 0)
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result := 0.U(32.W) ## quotient(31, 0)
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}
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io.out.valid := (count === (bits+1).U) && busy
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io.out.bits := RegNext(result)
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io.out.valid := RegNext((count === (bits+1).U) && busy)
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when (io.out.valid) {
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busy := false.B
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}
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