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4 Commits

Author SHA1 Message Date
Anton Blanchard
63ed617cb6 Remove SystemVerilog syntax 
Lattice Diamond doesn't seem to support SystemVerilog which is a bit
depressing. We only use the syntax in a few places, so fix that up.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
 2020-01-31 02:49:26 +11:00
Anton Blanchard
858ac3281c Fix a few issues in toplevel.v 
Vivado and verilator flagged a few issues.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
 2020-01-30 18:11:46 +11:00
Anton Blanchard
755c90b4fa Fix typo in toplevel signal name 
I must have screwed this up when adding the PLL. It's surprising
that yosys didn't complain.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
 2020-01-30 07:56:24 +11:00
Anton Blanchard
f138ab7c7c Initial import 2020-01-30 05:20:07 +11:00