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Remove sim console

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We can force all existing code to use the UART console
by passing 0 in bit zero of the sim config register.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
This commit is contained in:
Anton Blanchard
2019-09-11 07:16:56 +10:00
committed by Anton Blanchard
parent 68533c4cfb
commit a2df2a10a2
3 changed files with 5 additions and 40 deletions
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12
decode1.vhdl
View File

@@ -222,9 +222,6 @@ architecture behaviour of decode1 is
PPC_XOR => (ALU, OP_XOR, RS, RB, NONE, RA, NONE, NONE, NONE, '0', '0', '0', '0', NONE, '0', '0', '0', '0', '0', '0', RC, '0', '1'),
PPC_XORI => (ALU, OP_XOR, RS, CONST_UI, NONE, RA, NONE, NONE, NONE, '0', '0', '0', '0', NONE, '0', '0', '0', '0', '0', '0', NONE, '0', '1'),
PPC_XORIS => (ALU, OP_XOR, RS, CONST_UI_HI, NONE, RA, NONE, NONE, NONE, '0', '0', '0', '0', NONE, '0', '0', '0', '0', '0', '0', NONE, '0', '1'),
PPC_SIM_READ => (ALU, OP_SIM_READ, NONE, NONE, NONE, RT, NONE, NONE, NONE, '0', '0', '0', '0', NONE, '0', '0', '0', '0', '0', '0', NONE, '0', '1'),
PPC_SIM_POLL => (ALU, OP_SIM_POLL, NONE, NONE, NONE, RT, NONE, NONE, NONE, '0', '0', '0', '0', NONE, '0', '0', '0', '0', '0', '0', NONE, '0', '1'),
PPC_SIM_WRITE => (ALU, OP_SIM_WRITE, RS, NONE, NONE, NONE, NONE, NONE, NONE, '0', '0', '0', '0', NONE, '0', '0', '0', '0', '0', '0', NONE, '0', '1'),
PPC_SIM_CONFIG => (ALU, OP_SIM_CONFIG,NONE, NONE, NONE, RT, NONE, NONE, NONE, '0', '0', '0', '0', NONE, '0', '0', '0', '0', '0', '0', NONE, '0', '1'),
others => decode_rom_init
@@ -834,15 +831,6 @@ begin
elsif std_match(f_in.insn, "011011--------------------------") then
report "PPC_xoris";
ppc_insn := PPC_XORIS;
elsif std_match(f_in.insn, "000001---------------0000000000-") then
report "PPC_SIM_READ";
ppc_insn := PPC_SIM_READ;
elsif std_match(f_in.insn, "000001---------------0000000001-") then
report "PPC_SIM_POLL";
ppc_insn := PPC_SIM_POLL;
elsif std_match(f_in.insn, "000001---------------0000000010-") then
report "PPC_SIM_WRITE";
ppc_insn := PPC_SIM_WRITE;
elsif std_match(f_in.insn, "000001---------------0000000011-") then
report "PPC_SIM_CONFIG";
ppc_insn := PPC_SIM_CONFIG;

5
decode_types.vhdl
View File

@@ -37,7 +37,7 @@ package decode_types is
PPC_STWCX, PPC_STWU, PPC_STWUX, PPC_STWX, PPC_SUBF, PPC_SUBFC,
PPC_SUBFE, PPC_SUBFIC, PPC_SUBFME, PPC_SUBFZE, PPC_SYNC, PPC_TD,
PPC_TDI, PPC_TW, PPC_TWI, PPC_XOR, PPC_XORI, PPC_XORIS,
PPC_SIM_READ, PPC_SIM_POLL, PPC_SIM_WRITE, PPC_SIM_CONFIG);
PPC_SIM_CONFIG);
type insn_type_t is (OP_ILLEGAL, OP_NOP, OP_ADD, OP_ADDC, OP_ADDEX, OP_ADDME,
OP_ADDPCIS, OP_AND, OP_ANDC, OP_ATTN, OP_B, OP_BA, OP_BC,
@@ -59,8 +59,7 @@ package decode_types is
OP_RLDIMI, OP_RLWIMI, OP_RLWINM, OP_RLWNM, OP_SETB, OP_SLD,
OP_SLW, OP_SRAD, OP_SRADI, OP_SRAW, OP_SRAWI, OP_SRD, OP_SRW,
OP_SUBF, OP_SUBFC, OP_SUBFME, OP_SYNC, OP_TD, OP_TDI, OP_TW,
OP_TWI, OP_XOR, OP_SIM_READ, OP_SIM_POLL, OP_SIM_WRITE,
OP_SIM_CONFIG);
OP_TWI, OP_XOR, OP_SIM_CONFIG);
type input_reg_a_t is (NONE, RA, RA_OR_ZERO, RS);
type input_reg_b_t is (NONE, RB, RS, CONST_UI, CONST_SI, CONST_SI_HI, CONST_UI_HI, CONST_LI, CONST_BD, CONST_DS);

28
execute1.vhdl
View File

@@ -320,33 +320,11 @@ begin
result := ppc_xor(e_in.read_data1, e_in.read_data2);
result_en := 1;
-- sim console
when OP_SIM_READ =>
if SIM = true then
sim_console_read(result);
result_en := 1;
else
terminate_out <= '1';
report "illegal";
end if;
when OP_SIM_POLL =>
if SIM = true then
sim_console_poll(result);
result_en := 1;
else
terminate_out <= '1';
report "illegal";
end if;
when OP_SIM_WRITE =>
if SIM = true then
sim_console_write(e_in.read_data1);
else
terminate_out <= '1';
report "illegal";
end if;
when OP_SIM_CONFIG =>
-- bit 0 was used to select the microwatt console, which
-- we no longer support.
if SIM = true then
result := x"0000000000000001";
result := x"0000000000000000";
else
result := x"0000000000000000";
end if;