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mirror of https://github.com/j-core/j-core-ice40.git synced 2026-04-20 01:24:16 +00:00

Add in the test rom

This commit is contained in:
J
2019-03-03 19:35:20 -05:00
parent ea1dd551f9
commit 9e5f83edd9
28 changed files with 8601 additions and 0 deletions

57
testrom/Makefile Normal file
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OBJS := entry.o gdb.o sh2.o main.o version.o
OBJS += uartlite.o
#OBJS += uart16550.o
TESTS_OBJS := testbra.o
TESTS_OBJS += testmov.o testmov2.o testmov3.o
TESTS_OBJS += testalu.o
TESTS_OBJS += testshift.o
TESTS_OBJS += testmul.o testmulu.o testmuls.o testmull.o testdmulu.o testdmuls.o testmulconf.o
TESTS_OBJS += testdiv.o
TESTS_OBJS += testmacw.o testmacl.o
TESTS_OBJS := $(addprefix tests/,$(TESTS_OBJS))
CC = sh2-elf-gcc
LD = sh2-elf-ld
AR = sh2-elf-ar
RANLIB = sh2-elf-ranlib
ECHO = /bin/echo
LDFLAGS = -T startup/sh32.x -Map main.map
LIBGCC = $(shell $(CC) -print-libgcc-file-name)
# CFLAGS := -mj2 -g -Os -Wall
CFLAGS := -DNO_DDR -DNO_TESTS -mj2 -g -Os -Wall
DDR ?= ddr16
ifeq ($(DDR), lpddr)
CFLAGS += -D LPDDR
else ifeq ($(DDR), ddr8)
CFLAGS += -D DDR_BL4
endif
all: main.elf
tests/libtests.a: $(TESTS_OBJS)
$(AR) -cur $@ $^
$(RANLIB) $@
@echo Built test library
main.elf: $(OBJS) tests/libtests.a
$(LD) $(LDFLAGS) $(OBJS) -Ltests -ltests $(LIBGCC) -o $@
main.o: main.c
$(CC) $(CFLAGS) -fno-inline -c $<
.s.o:
$(CC) $(CFLAGS) -c $< -o $@
version.c:
@printf "char version_string[] = \"revision: $(shell hg head | head -1)\\\\nbuild: $(shell date)\\\\n\";\n" > $@
clean:
rm -f *.[oa] tests/*.o tests/libtests.a
rm -f version.c
rm -f main.srec main.elf *.map a.out
.PHONY: clean all

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testrom/entry.c Normal file
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/*
Copyright (c) 2001 by William A. Gatliff
All rights reserved. bgat@billgatliff.com
Copyright (c) 2009 by D. Jeff Dionne
All rights reserved. jeff@uClinux.org
See the file COPYING for details.
This file is provided "as-is", and without any express
or implied warranties, including, without limitation,
the implied warranties of merchantability and fitness
for a particular purpose.
The authors welcome feedback regarding this file.
Simple GDB ROM for SH J2 architecture devices
*/
#include "gdb.h"
#include "sh2.h"
void uart_tx(unsigned char c);
unsigned char uart_rx();
void main_sh();
void alutest();
int gdb_putc (int c)
{
uart_tx(c & 0xff);
return c & 0xff;
}
int gdb_getc (void)
{
return uart_rx();
}
void gdb_monitor_onexit (void) {}
void gdb_startup (void)
{
main_sh();
}
__asm__(
".section .vect\n"
".align 2\n"
".global _vector_table\n"
"_vector_table:\n"
" .long _start /* 0: power-on reset */\n"
" .long _stack+0x2fc\n"
" .long _start /* 2: manual reset */\n"
" .long _stack+0x2fc\n"
" .long _gdb_illegalinst_isr /* 4: general illegal instruction */\n"
" .long _gdb_unhandled_isr /* 5: (reserved) */\n"
" .long _gdb_illegalinst_isr /* 6: slot illegal instruction */\n"
" .long _gdb_unhandled_isr /* 7: (reserved) */\n"
" .long _gdb_unhandled_isr /* 8: (reserved) */\n"
" .long _gdb_addresserr_isr /* 9: CPU address error */\n"
" .long _gdb_addresserr_isr /* 10: DMAC/DTC address error */\n"
" .long _gdb_nmi_isr /* 11: NMI */\n"
" .long _gdb_unhandled_isr /* 12: UBC */\n"
" .long _gdb_unhandled_isr /* 13: (reserved) */\n"
" .long _gdb_unhandled_isr /* 14: (reserved) */\n"
" .long _gdb_unhandled_isr /* 15: (reserved) */\n"
#if 0 /* using sh2i.c for interrupts test */
" .long _gdb_pit_isr /* 16: PIT */\n"
" .long _gdb_ihandler_emac /* 0x11: (EMAC interface) */\n"
" .long _gdb_unhandled_isr /* 0x12: (reserved) */\n"
" .long _gdb_unhandled_isr /* 0x13: (reserved) */\n"
" .long _gdb_unhandled_isr /* 0x14: (reserved) */\n"
" .long _gdb_unhandled_isr /* 0x15: (reserved) */\n"
" .long _gdb_unhandled_isr /* 0x16: (reserved) */\n"
" .long _gdb_ihandler_uart1 /* 0x17: (UART Console) */\n"
" .long _gdb_unhandled_isr /* 0x18: (reserved) */\n"
#else /* interrupts default to save space */
" .long _gdb_unhandled_isr /* 16: PIT */\n"
" .long _gdb_unhandled_isr /* 0x11: (EMAC interface) */\n"
" .long _gdb_unhandled_isr /* 0x12: (reserved) */\n"
" .long _gdb_unhandled_isr /* 0x13: (reserved) */\n"
" .long _gdb_unhandled_isr /* 0x14: (reserved) */\n"
" .long _gdb_unhandled_isr /* 0x15: (reserved) */\n"
" .long _gdb_unhandled_isr /* 0x16: (reserved) */\n"
" .long _gdb_unhandled_isr /* 0x17: (UART Console) */\n"
" .long _gdb_unhandled_isr /* 0x18: (reserved) */\n"
#endif
" .long _gdb_unhandled_isr /* 25: (when AIC countdown reach 0) */\n"
" .long _gdb_unhandled_isr /* 26: (reserved) */\n"
" .long _gdb_unhandled_isr /* 27: (reserved) */\n"
" .long _gdb_unhandled_isr /* 28: (reserved) */\n"
" .long _gdb_unhandled_isr /* 29: (reserved) */\n"
" .long _gdb_unhandled_isr /* 30: (reserved) */\n"
" .long _gdb_unhandled_isr /* 31: (reserved) */\n"
" .long _gdb_trapa32_isr /* 32: trap 32 instruction */\n"
" .long _gdb_trapa33_isr /* 33: trap 33 instruction */\n"
" .long _gdb_trapa34_isr /* 34: trap 34 instruction */\n"
" .long _gdb_unhandled_isr /* */\n"
" .long _gdb_unhandled_isr /* */\n"
" .long _gdb_unhandled_isr /* */\n"
" .long _gdb_unhandled_isr /* */\n"
" .long _gdb_unhandled_isr /* */\n"
" .long _gdb_unhandled_isr\n"
" .long _gdb_unhandled_isr\n"
" .long _gdb_unhandled_isr\n"
" .long _gdb_unhandled_isr\n"
" .long _gdb_unhandled_isr\n"
" .long _gdb_unhandled_isr\n"
" .long _gdb_unhandled_isr\n"
" .long _gdb_unhandled_isr\n"
" .long _gdb_unhandled_isr\n"
" .long _gdb_unhandled_isr\n"
" .long _gdb_unhandled_isr\n"
" .long _gdb_unhandled_isr\n"
" .long _gdb_unhandled_isr\n"
" .long _gdb_unhandled_isr\n"
" .long _gdb_unhandled_isr\n"
" .long _gdb_unhandled_isr\n"
" .long _gdb_unhandled_isr\n"
" .long _gdb_unhandled_isr\n"
" .long _gdb_unhandled_isr\n"
" .long _gdb_unhandled_isr\n"
" .long _gdb_unhandled_isr\n"
" .long _gdb_unhandled_isr\n"
" .long _gdb_unhandled_isr\n"
" .long _gdb_unhandled_isr\n"
""
".section .text\n"
".align 2\n"
"_testjsr:\n"
" mov.l jsr_leds, r0\n"
" mov.l pio_addr, r1\n"
" mov.l r0, @r1\n"
" rts\n"
" nop\n"
""
".section .text\n"
".align 2\n"
".global _start\n"
".global start\n"
"start:\n"
"_start:\n"
" nop\n"
" mov.l start_leds, r0\n"
" mov.l pio_addr, r1\n"
" mov.l r0, @r1\n"
" mov.l testjsr_k, r0\n"
" jsr @r0\n"
" nop\n"
" mov.l pio_addr, r1\n"
" mov.l start1_leds, r0\n"
" mov.l r0, @r1\n"
#ifndef NO_TESTS
" mov.l testbra_k, r0\n"
" jsr @r0\n"
" nop\n"
" mov.l testmov_k, r0\n"
" jsr @r0\n"
" nop\n"
" mov.l testmov2_k, r0\n"
" jsr @r0\n"
" nop\n"
" mov.l testmov3_k, r0\n"
" jsr @r0\n"
" nop\n"
" mov.l testalu_k, r0\n"
" jsr @r0\n"
" nop\n"
" mov.l testshift_k, r0\n"
" jsr @r0\n"
" nop\n"
" mov.l testmul_k, r0\n"
" jsr @r0\n"
" nop\n"
" mov.l testmulu_k, r0\n"
" jsr @r0\n"
" nop\n"
" mov.l testmuls_k, r0\n"
" jsr @r0\n"
" nop\n"
" mov.l testmull_k, r0\n"
" jsr @r0\n"
" nop\n"
" mov.l testdmulu_k, r0\n"
" jsr @r0\n"
" nop\n"
" mov.l testdmuls_k, r0\n"
" jsr @r0\n"
" nop\n"
" mov.l testmulconf_k, r0\n"
" jsr @r0\n"
" nop\n"
" mov.l testdiv_k, r0\n"
" jsr @r0\n"
" nop\n"
" mov.l testmacw_k, r0\n"
" jsr @r0\n"
" nop\n"
" mov.l testmacl_k, r0\n"
" jsr @r0\n"
#endif /* NO_TESTS */
" nop\n"
" mov #0, r0\n"
" mov #1, r1\n"
" mov #2, r2\n"
" mov #3, r3\n"
" mov #4, r4\n"
" mov #5, r5\n"
" mov #6, r6\n"
" mov #7, r7\n"
" mov #8, r8\n"
" mov #9, r9\n"
" mov #10, r10\n"
" mov #11, r11\n"
" mov #12, r12\n"
" mov #13, r13\n"
" mov #0, r14\n"
" ldc r14, vbr\n"
" ldc r14, gbr\n"
" ldc r14, sr\n"
" mov.l gdbstartup_k, r0\n"
" jsr @r0\n"
" nop\n"
" trapa #32\n"
" nop\n"
".align 2\n"
"gdbstartup_k: .long _gdb_startup\n"
"gdbmonitor_k: .long _gdb_monitor\n"
"testjsr_k: .long _testjsr\n"
#ifndef NO_TESTS
"testbra_k: .long _testbra\n"
"testmov_k: .long _testmov\n"
"testmov2_k: .long _testmov2\n"
"testmov3_k: .long _testmov3\n"
"testalu_k: .long _testalu\n"
"testshift_k: .long _testshift\n"
"testmul_k: .long _testmul\n"
"testmulu_k: .long _testmulu\n"
"testmuls_k: .long _testmuls\n"
"testmull_k: .long _testmull\n"
"testdmulu_k: .long _testdmulu\n"
"testdmuls_k: .long _testdmuls\n"
"testmulconf_k: .long _testmulconf\n"
"testdiv_k: .long _testdiv\n"
"testmacw_k: .long _testmacw\n"
"testmacl_k: .long _testmacl\n"
#endif /* NO_TESTS */
"pio_addr: .long 0xABCD0000\n"
"start_leds: .long 0x000000ff\n"
"start1_leds: .long 0x0000004f\n"
"jsr_leds: .long 0x00000011\n"
);

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/*
Copyright (c) 2001 by William A. Gatliff
All rights reserved. bgat@billgatliff.com
See the file COPYING for details.
This file is provided "as-is", and without any express
or implied warranties, including, without limitation,
the implied warranties of merchantability and fitness
for a particular purpose.
The author welcomes feedback regarding this file.
*/
/* $Id$ */
/* The gdb remote communication protocol.
A debug packet whose contents are <data>
is encapsulated for transmission in the form:
$ <data> # CSUM1 CSUM2
<data> must be ASCII alphanumeric and cannot include characters
'$' or '#'. If <data> starts with two characters followed by
':', then the existing stubs interpret this as a sequence number.
CSUM1 and CSUM2 are ascii hex representation of an 8-bit
checksum of <data>, the most significant nibble is sent first.
the hex digits 0-9,a-f are used.
Receiver responds with:
+ - if CSUM is correct and ready for next packet
- - if CSUM is incorrect
<data> is as follows:
All values are encoded in ascii hex digits.
Request Packet
read registers g
reply XX....X Each byte of register data
is described by two hex digits.
Registers are in the internal order
for GDB, and the bytes in a register
are in the same order the machine uses.
or ENN for an error.
write regs GXX..XX Each byte of register data
is described by two hex digits.
reply OK for success
ENN for an error
write reg Pn...=r... Write register n... with value r...,
which contains two hex digits for each
byte in the register (target byte
order).
reply OK for success
ENN for an error
(not supported by all stubs).
read mem mAA..AA,LLLL AA..AA is address, LLLL is length.
reply XX..XX XX..XX is mem contents
Can be fewer bytes than requested
if able to read only part of the data.
or ENN NN is errno
write mem MAA..AA,LLLL:XX..XX
AA..AA is address,
LLLL is number of bytes,
XX..XX is data
reply OK for success
ENN for an error (this includes the case
where only part of the data was
written).
write mem XAA..AA,LLLL:XX..XX
(binary) AA..AA is address,
LLLL is number of bytes,
XX..XX is binary data
reply OK for success
ENN for an error
cont cAA..AA AA..AA is address to resume
If AA..AA is omitted,
resume at same address.
step sAA..AA AA..AA is address to resume
If AA..AA is omitted,
resume at same address.
last signal ? Reply the current reason for stopping.
This is the same reply as is generated
for step or cont : SAA where AA is the
signal number.
There is no immediate reply to step or cont.
The reply comes when the machine stops.
It is SAA AA is the "signal number"
or... TAAn...:r...;n:r...;n...:r...;
AA = signal number
n... = register number
r... = register contents
or... WAA The process exited, and AA is
the exit status. This is only
applicable for certains sorts of
targets.
kill request k
toggle debug d toggle debug flag (see 386 & 68k stubs)
reset r reset -- see sparc stub.
reserved <other> On other requests, the stub should
ignore the request and send an empty
response ($#<checksum>). This way
we can extend the protocol and GDB
can tell whether the stub it is
talking to uses the old or the new.
search tAA:PP,MM Search backwards starting at address
AA for a match with pattern PP and
mask MM. PP and MM are 4 bytes.
Not supported by all stubs.
general query qXXXX Request info about XXXX.
general set QXXXX=yyyy Set value of XXXX to yyyy.
query sect offs qOffsets Get section offsets. Reply is
Text=xxx;Data=yyy;Bss=zzz
console output Otext Send text to stdout. Only comes from
remote target.
Responses can be run-length encoded to save space. A '*' means that
the next character is an ASCII encoding giving a repeat count which
stands for that many repititions of the character preceding the '*'.
The encoding is n+29, yielding a printable character where n >=3
(which is where rle starts to win). Don't use an n > 126.
So
"0* " means the same as "0000".
*/
#include "gdb.h"
#include "syscalls.h"
#if !defined(GDB_RXBUFLEN)
#define GDB_RXBUFLEN 200
#endif
#define min(a,b) ((a) > (b) ? (b) : (a))
#define max(a,b) ((a) > (b) ? (a) : (b))
#define is_aligned_long(addr,len) \
(((len) >= sizeof(long)) && ((long)(addr) % sizeof(long) == 0))
#define is_aligned_short(addr,len) \
(((len) >= sizeof(short)) && ((long)(addr) % sizeof(short) == 0))
/* converts '[0-9,a-f,A-F]' to its integer equivalent */
static int hex_to_int (char h)
{
if (h >= 'a' && h <= 'f') return h - 'a' + 10;
if (h >= '0' && h <= '9') return h - '0';
if (h >= 'A' && h <= 'F') return h - 'A' + 10;
return 0;
}
/* converts the low nibble of i to its hex character equivalent */
static char lnibble_to_hex (char i)
{
static const char lnibble_to_hex_table[] = "0123456789abcdef";
return lnibble_to_hex_table[i & 0xf];
}
/* translates a delimited hex string to a long */
static const char* hargs_parse_long (const char* hargs, long* l, int delim)
{
*l = 0;
while (*hargs != delim) *l = (*l << 4) + hex_to_int(*hargs++)
;
return hargs + 1;
}
/*
TODO: the lcbuf unions assume and depend that lbuf and sbuf start at
the same address. Is this always correct? Is there a better way?
*/
/* Converts a memory region of length len bytes, starting at mem, into
a string of hex bytes. Returns the number of bytes placed into
hexbuf.
This function carefully preserves the endianness of the data,
because that's what gdb expects. This function also optimizes the
read process into the largest units possible, in case we're reading
a peripheral register that can't deal with unaligned or byte-wide
accesses. */
static int mem_to_hexbuf (const void* mem, char* hbuf, int len)
{
int i = 0;
union
{
long lbuf;
short sbuf;
char cbuf[sizeof(long)];
} lcbuf;
int cbuflen;
int retval = 0;
while (len > 0)
{
if (is_aligned_long(mem, len))
{
cbuflen = sizeof (long);
lcbuf.lbuf = *(long*)mem;
mem += sizeof (long);
len -= sizeof (long);
}
else if (is_aligned_short(mem, len))
{
cbuflen = sizeof (short);
lcbuf.sbuf = *(short*)mem;
mem += sizeof (short);
len -= sizeof (short);
}
else
{
cbuflen = sizeof (char);
lcbuf.cbuf[0] = *(char*)mem;
mem += sizeof (char);
len -= sizeof (char);
}
for (i = 0; i < cbuflen; i++ )
{
*hbuf++ = lnibble_to_hex(lcbuf.cbuf[i] >> 4);
*hbuf++ = lnibble_to_hex(lcbuf.cbuf[i]);
retval += 2;
}
}
return retval;
}
/*
Reads (len * 2) hex digits from hbuf, converts them to binary,
writes them to mem. Returns a pointer to the first empty byte after
the region written.
Carefully preserves endianness, optimizes write accesses so as to be
hardware-friendly.
*/
static char* hexbuf_to_mem (const char* hbuf, void* mem, int len)
{
int i = 0;
union {
long lbuf;
short sbuf;
char cbuf[sizeof(long)];
} lcbuf;
void* cache_start = mem;
int cache_len = len;
while (len > 0)
{
if (is_aligned_long(mem, len))
{
for( i = 0; i < sizeof(long); i++ )
{
lcbuf.cbuf[i] = (hex_to_int(*hbuf++) << 4);
lcbuf.cbuf[i] += hex_to_int(*hbuf++);
}
*((long*)mem) = lcbuf.lbuf;
mem += sizeof(long);
len -= sizeof(long);
}
else if (is_aligned_short(mem, len))
{
for( i = 0; i < sizeof(short); i++ )
{
lcbuf.cbuf[i] = (hex_to_int(*hbuf++) << 4);
lcbuf.cbuf[i] += hex_to_int(*hbuf++);
}
*((short*)mem) = lcbuf.sbuf;
mem += sizeof(short);
len -= sizeof(short);
}
else
{
lcbuf.cbuf[0] = (hex_to_int(*hbuf++) << 4);
lcbuf.cbuf[0] += hex_to_int(*hbuf++);
*((char*)mem) = lcbuf.cbuf[0];
mem += sizeof(char);
len -= sizeof(char);
}
}
gdb_flush_cache(cache_start, cache_len);
return mem;
}
static const void* xbin_to_bin( const void* xbin, char* bin)
{
if (*(char*)xbin == 0x7d)
{
xbin++;
*bin = *((char*)xbin) ^ 0x20;
xbin++;
}
else
{
*bin = *((char*)xbin);
xbin++;
}
return xbin;
}
/*
Converts the escaped-binary ('X' packet) array pointed to by buf
into binary, to be placed in mem. Returns a pointer to the first
empty byte after the region written.
*/
static char* xmem_to_mem (const char* xmem, void* mem, int len)
{
int i = 0;
union
{
long lbuf;
short sbuf;
char cbuf[sizeof(long)];
} lcbuf;
void* cache_start = mem;
int cache_len = len;
while (len > 0) {
if (is_aligned_long(mem, len))
{
for (i = 0; i < sizeof(long); i++)
xmem = xbin_to_bin(xmem, &lcbuf.cbuf[i]);
*((long*)mem) = lcbuf.lbuf;
mem += sizeof (long);
len -= sizeof (long);
}
else if (is_aligned_short(mem, len))
{
for( i = 0; i < sizeof(short); i++ )
xmem = xbin_to_bin(xmem, &lcbuf.cbuf[i]);
*((short*)mem) = lcbuf.sbuf;
mem += sizeof (short);
len -= sizeof (short);
}
else
{
xmem = xbin_to_bin(xmem, &lcbuf.cbuf[0]);
*((char*)mem) = lcbuf.cbuf[0];
mem += sizeof (char);
len -= sizeof (char);
}
}
gdb_flush_cache(cache_start, cache_len);
return mem;
}
/*
Writes a buffer of length len to gdb_putc().
Returns the checksum of the bytes.
*/
static int putbuf (int len, const char* buf)
{
unsigned char sum = 0;
while (len--)
{
sum += *(unsigned char*)buf;
gdb_putc( *buf++ );
}
return sum;
}
/* Sends an RSP message */
static void putmsg (char c, const char *buf, int len)
{
unsigned char sum;
do
{
/* send the header */
gdb_putc('$');
/* send the message type, if specified */
if (c) gdb_putc(c);
/* send the data */
sum = c + putbuf(len, buf);
/* send the footer */
gdb_putc('#');
gdb_putc(lnibble_to_hex(sum >> 4));
gdb_putc(lnibble_to_hex(sum));
}
while ('+' != gdb_getc());
return;
}
/* Reads a message */
static int getmsg (char *rxbuf)
{
char c;
unsigned char sum;
unsigned char rx_sum;
char *buf;
get_msg:
/* wait around for start character, ignore all others */
while (gdb_getc() != '$');
/* start counting bytes */
buf = rxbuf;
sum = 0;
/* read until we see the '#' at the end of the packet */
do
{
*buf++ = c = gdb_getc();
if (c != '#') sum += c;
/* since the buffer is ascii, may as well terminate it */
*buf = 0;
}
while (c != '#');
/* receive checksum */
rx_sum = hex_to_int(gdb_getc());
rx_sum = (rx_sum << 4) + hex_to_int(gdb_getc());
/* if computed checksum doesn't match received checksum, then reject */
if (sum != rx_sum)
{
gdb_putc('-');
goto get_msg;
}
/* got the message ok */
else gdb_putc('+');
return 1;
}
/*
"last signal" message
"Sxx", where:
xx is the signal number
*/
static void last_signal (int sigval)
{
char tx_buf[2];
tx_buf[0] = lnibble_to_hex(sigval >> 4);
tx_buf[1] = lnibble_to_hex(sigval);
putmsg('S', tx_buf, 2);
return;
}
/*
"expedited response" message
"Txx..........."
*/
static void expedited (int sigval)
{
long val;
int id = 0;
int reglen;
int sum;
do
{
/* send header */
gdb_putc('$');
sum = gdb_putc('T');
/* signal number */
sum += gdb_putc(lnibble_to_hex(sigval >> 4));
sum += gdb_putc(lnibble_to_hex(sigval));
/* register values */
id = 0;
while ((reglen = gdb_peek_register_file(id, &val)) != 0)
{
/* register id */
sum += gdb_putc(lnibble_to_hex(id >> 4));
sum += gdb_putc(lnibble_to_hex(id));
sum += gdb_putc(':');
/* register value */
switch(reglen)
{
case 4:
sum += gdb_putc(lnibble_to_hex(val >> 28));
sum += gdb_putc(lnibble_to_hex(val >> 24));
case 3:
sum += gdb_putc(lnibble_to_hex(val >> 20));
sum += gdb_putc(lnibble_to_hex(val >> 16));
case 2:
sum += gdb_putc(lnibble_to_hex(val >> 12));
sum += gdb_putc(lnibble_to_hex(val >> 8));
case 1:
sum += gdb_putc(lnibble_to_hex(val >> 4));
sum += gdb_putc(lnibble_to_hex(val));
break;
}
sum += gdb_putc(';');
/* try the next register */
id++;
}
/* send the message footer */
gdb_putc('#');
gdb_putc(lnibble_to_hex(sum >> 4));
gdb_putc(lnibble_to_hex(sum));
}
while ('+' != gdb_getc());
return;
}
static void read_memory (const char *hargs)
{
char tx_buf[sizeof(long) * 2];
long addr = 0, orig_addr = 0;
long len = 0, orig_len = 0;
int tx;
unsigned char sum = 0;
/* parse address, length */
hargs = hargs_parse_long(hargs, &addr, ',');
hargs = hargs_parse_long(hargs, &len, '#');
orig_addr = addr;
orig_len = len;
do
{
addr = orig_addr;
len = orig_len;
gdb_putc('$');
/* send the message a piece at a time, so we don't need much memory */
while (len)
{
tx = mem_to_hexbuf((void*)addr, tx_buf, min(len, sizeof(long)));
sum += putbuf(tx, tx_buf);
addr += tx / 2;
len -= min(tx / 2, len);
}
gdb_putc('#');
gdb_putc(lnibble_to_hex(sum >> 4));
gdb_putc(lnibble_to_hex(sum));
} while (gdb_getc() != '+');
return;
}
static void write_memory (const char *hargs)
{
long addr = 0;
long len = 0;
/* parse address, length */
hargs = hargs_parse_long(hargs, &addr, ',');
hargs = hargs_parse_long(hargs, &len, ':' );
/* write all requested bytes */
hexbuf_to_mem(hargs, (void*)addr, len);
putmsg(0, "OK", 2);
return;
}
static void write_xbin_memory (const char *hargs)
{
long addr = 0;
long len = 0;
/* parse address, length */
hargs = hargs_parse_long(hargs, &addr, ',');
hargs = hargs_parse_long(hargs, &len, ':' );
/* write all requested bytes */
xmem_to_mem(hargs, (void*)addr, len);
putmsg(0, "OK", 2);
return;
}
static void write_registers (char *hargs)
{
int id = 0;
long val;
int reglen;
while (*hargs != '#')
{
/* how big is this register? */
reglen = gdb_peek_register_file(id, &val);
if(reglen)
{
/* extract the register's value */
hexbuf_to_mem(hargs, &val, reglen);
hargs += sizeof(long) * 2;
/* stuff it into the register file */
gdb_poke_register_file(id++, val);
}
else break;
}
putmsg(0, "OK", 2);
return;
}
static void read_registers (void)
{
char tx_buf[sizeof(long) * 2];
long val;
int id = 0;
int reglen;
unsigned char sum;
do
{
gdb_putc('$');
sum = 0;
/* send register values */
id = 0;
while((reglen = gdb_peek_register_file(id++, &val)) != 0)
sum += putbuf(mem_to_hexbuf(&val, tx_buf, reglen), tx_buf);
/* send the message footer */
gdb_putc('#');
gdb_putc(lnibble_to_hex(sum >> 4));
gdb_putc(lnibble_to_hex(sum));
}
while ('+' != gdb_getc());
return;
}
static void write_register (char *hargs)
{
long id = 0;
long val = 0;
int reglen;
while (*hargs != '=') id = (id << 4) + hex_to_int(*hargs++)
;
hargs++;
reglen = gdb_peek_register_file(id, &val);
hexbuf_to_mem(hargs, &val, reglen);
gdb_poke_register_file(id, val);
putmsg(0, "OK", 2);
return;
}
void gdb_console_output (int len, const char *buf)
{
char tx_buf[2];
unsigned char sum;
gdb_putc('$');
sum = putbuf(1, "O");
while (len--)
{
tx_buf[0] = lnibble_to_hex(*buf >> 4);
tx_buf[1] = lnibble_to_hex(*buf++);
sum += putbuf(2, tx_buf);
}
/* send the message footer */
gdb_putc('#');
gdb_putc(lnibble_to_hex(sum >> 4));
gdb_putc(lnibble_to_hex(sum));
/* DON'T wait for response; we don't want to get hung
up here and halt the application if gdb has gone away! */
return;
}
static char * syscall_name[] = { "Fopen,", "Fclose,", "Fread,", "Fwrite,", "Flseek," };
static int syscall_namelen[] = { 6, 7, 6, 7, 7 };
static int strl(char *buf)
{
int i;
for (i=0; buf[i]; i++) {}
return i;
}
int gdb_file_io (int syscall, int arg1, int arg2, int arg3)
{
char tx_buf[sizeof(long)*2];
int len;
unsigned char sum;
if (!syscall || syscall > __NR_syscalls) return -1;
gdb_putc('$');
sum = putbuf(syscall_namelen[syscall-1], syscall_name[syscall-1]);
sum += putbuf(mem_to_hexbuf(&arg1, tx_buf, sizeof(int)), tx_buf);
/* Who thought this was a good idea? If it's open, we need a file name length */
if (syscall == __NR_open) {
sum += putbuf(1, "/");
len = strl((char *)arg1) + 1;
sum += putbuf(mem_to_hexbuf(&len, tx_buf, sizeof(int)), tx_buf);
}
if (syscall != __NR_close) { /* close has only 1 arg */
sum += putbuf(1, ",");
sum += putbuf(mem_to_hexbuf(&arg2, tx_buf, sizeof(int)), tx_buf);
sum += putbuf(1, ",");
sum += putbuf(mem_to_hexbuf(&arg3, tx_buf, sizeof(int)), tx_buf);
}
/* send the message footer */
gdb_putc('#');
gdb_putc(lnibble_to_hex(sum >> 4));
gdb_putc(lnibble_to_hex(sum));
return gdb_monitor(0); /* handle requests until the system call returns */
}
static int _strcmp(const char *a, const char *b) {
/* walk through strings while they're equal and haven't hit
terminating 0 */
while ((*a && *b) && (*a == *b)) {
a++;
b++;
}
return *a - *b;
}
/*
The gdb command processor.
*/
int gdb_monitor (int sigval)
{
char rxbuf[GDB_RXBUFLEN];
char *hargs;
long addr;
gdb_monitor_onentry();
while (1)
{
getmsg(rxbuf);
hargs = rxbuf;
switch (*hargs++)
{
case '?':
last_signal(sigval);
break;
case 'c':
/* this call probably doesn't return */
hargs_parse_long(hargs, &addr, '#');
gdb_continue(addr);
/* if it does, exit back to interrupted code */
return 0;
case 'D':
/* detach from target, gdb is going away */
putmsg(0, "OK", 2);
gdb_detach();
break;
case 'F':
/* File syscall result. Return value syscall
* FIXME: this doesn't completely parse the reply */
if (*hargs=='-') return -1;
hargs_parse_long(hargs, &addr, '#');
putmsg(0, "OK", 2);
return addr;
case 'g': read_registers(); break;
case 'G': write_registers(hargs); break;
case 'H':
/* set thread--- unimplemented, but gdb likes it */
putmsg(0, "OK", 2);
break;
case 'k':
/* kill program */
putmsg(0, "OK", 2);
gdb_kill();
break;
case 'm': read_memory(hargs); break;
case 'M': write_memory(hargs); break;
case 'P': write_register(hargs); break;
case 'q':
/* query */
/* TODO: finish query command in gdb_handle_exception. */
if (_strcmp(hargs, "Offsets") == 0) {
/* for now, only respond to "Offsets" query */
putmsg(0, "Text=0;Data=0;Bss=0", 19);
} else {
putmsg(0, "", 0);
}
break;
case 's':
/* step (address optional) */
hargs_parse_long(hargs, &addr, '#');
gdb_step(addr);
/* exit back to interrupted code */
return 0;
case 'X':
/* write to memory (source in escaped-binary format) */
write_xbin_memory(hargs);
break;
default :
/* received a command we don't recognize---
send empty response per gdb spec */
putmsg(0, "", 0);
}
}
return 0;
}
void gdb_handle_exception (int sigval)
{
#if 1
/* for some reason, this seems to confuse gdb-5.0 */
/* tell the host why we're here */
expedited(sigval);
#else
last_signal(sigval);
#endif
/* ask gdb what to do next */
gdb_monitor(sigval);
/* return to the interrupted code */
gdb_return_from_exception();
return;
}

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/*
Copyright (c) 2001 by William A. Gatliff
All rights reserved. bgat@billgatliff.com
See the file COPYING for details.
This file is provided "as-is", and without any express
or implied warranties, including, without limitation,
the implied warranties of merchantability and fitness
for a particular purpose.
The author welcomes feedback regarding this file.
*/
/* $Id$ */
#if !defined(GDB_H_INCLUDED)
#define GDB_H_INCLUDED
/* platform-specific stuff, in <target>[-<platform>].c */
int gdb_putc (int c);
int gdb_getc (void);
int gdb_peek_register_file (int id, long *val);
int gdb_poke_register_file (int id, long val);
void gdb_step (long addr);
void gdb_continue (long addr);
void gdb_kill (void);
void gdb_detach (void);
void gdb_return_from_exception (void);
void gdb_flush_cache (void *start, int len);
void gdb_monitor_onentry (void);
void gdb_monitor_onexit (void);
void gdb_startup (void);
/* platform-neutral stuff, in gdb.c */
void gdb_console_output (int len, const char *buf);
int gdb_file_io (int syscall, int arg1, int arg2, int arg3);
int gdb_monitor (int sigval);
void gdb_handle_exception (int sigval);
/* gdb signal values */
#define GDB_SIGHUP 1
#define GDB_SIGINT 2
#define GDB_SIGQUIT 3
#define GDB_SIGILL 4
#define GDB_SIGTRAP 5
#define GDB_SIGABRT 6
#define GDB_SIGIOT 6
#define GDB_SIGBUS 7
#define GDB_SIGFPE 8
#define GDB_SIGKILL 9
#define GDB_SIGUSR1 10
#define GDB_SIGSEGV 11
#define GDB_SIGUSR2 12
#define GDB_SIGPIPE 13
#define GDB_SIGALRM 14
#define GDB_SIGTERM 15
#define GDB_SIGSTKFLT 16
#define GDB_SIGCHLD 17
#define GDB_SIGCONT 18
#define GDB_SIGSTOP 19
#define GDB_SIGTSTP 20
#define GDB_SIGTTIN 21
#define GDB_SIGTTOU 22
#define GDB_SIGURG 23
#define GDB_SIGXCPU 24
#define GDB_SIGXFSZ 25
#define GDB_SIGVTALRM 26
#define GDB_SIGPROF 27
#define GDB_SIGWINCH 28
#define GDB_SIGIO 29
#endif /* GDB_H_INCLUDED */

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#define LEDPORT (*(volatile unsigned long *)0xabcd0000)
extern char version_string[];
char ram0[256]; /* working ram for CPU tests */
void
putstr (char *str)
{
while (*str)
{
if (*str == '\n')
uart_tx ('\r');
uart_tx (*(str++));
}
}
#ifndef NO_DDR
#define DDR_BASE 0x10000000
#define MemoryRead(A) (*(volatile int*)(A))
#define MemoryWrite(A,V) *(volatile int*)(A)=(V)
//SD_A <= address_reg(25 downto 13); --address row
//SD_BA <= address_reg(12 downto 11); --bank_address
//cmd := address_reg(6 downto 4); --bits RAS & CAS & WE
int DdrInitData[] = {
// AddressLines Bank Command
#ifndef LPDDR
(0x000 << 13) | (0 << 11) | (7 << 4), //CKE=1; NOP="111"
(0x400 << 13) | (0 << 11) | (2 << 4), //A10=1; PRECHARGE ALL="010"
(0x001 << 13) | (1 << 11) | (0 << 4), //EMR disable DLL; BA="01"; LMR="000"
#ifndef DDR_BL4
(0x121 << 13) | (0 << 11) | (0 << 4), //SMR reset DLL, CL=2, BL=2; LMR="000"
#else
(0x122 << 13) | (0 << 11) | (0 << 4), //SMR reset DLL, CL=2, BL=4; LMR="000"
#endif
(0x400 << 13) | (0 << 11) | (2 << 4), //A10=1; PRECHARGE ALL="010"
(0x000 << 13) | (0 << 11) | (1 << 4), //AUTO REFRESH="001"
(0x000 << 13) | (0 << 11) | (1 << 4), //AUTO REFRESH="001
#ifndef DDR_BL4
(0x021 << 13) | (0 << 11) | (0 << 4) //clear DLL, CL=2, BL=2; LMR="000"
#else
(0x022 << 13) | (0 << 11) | (0 << 4) //clear DLL, CL=2, BL=4; LMR="000"
#endif
#else // LPDDR
(0x000 << 13) | (0 << 11) | (7 << 4), //CKE=1; NOP="111"
(0x000 << 13) | (0 << 11) | (7 << 4), //NOP="111" after 200 uS
(0x400 << 13) | (0 << 11) | (2 << 4), //A10=1; PRECHARGE ALL="010"
(0x000 << 13) | (0 << 11) | (1 << 4), //AUTO REFRESH="001"
(0x000 << 13) | (0 << 11) | (1 << 4), //AUTO REFRESH="001"
(0x021 << 13) | (0 << 11) | (0 << 4), //SMR CL=2, BL=2; LMR="000"
(0x000 << 13) | (1 << 11) | (0 << 4), //EMR BA="01"; LMR="000" Full strength full array
(0x000 << 13) | (0 << 11) | (7 << 4) //NOP="111" after ? uS
#endif
};
int
ddr_init (void)
{
volatile int i, j, k = 0;
for (i = 0; i < sizeof (DdrInitData) / sizeof (int); ++i)
{
MemoryWrite (DDR_BASE + DdrInitData[i], 0);
for (j = 0; j < 4; ++j)
++k;
}
for (j = 0; j < 100; ++j)
++k;
k += MemoryRead (DDR_BASE); //Enable DDR
return k;
}
#endif /* NO_DDR */
void
led(int v)
{
LEDPORT = v;
}
void
main_sh (void)
{
led(0x40);
uart_set_baudrate ();
led(0x042);
putstr ("CPU tests passed\n");
led(0x043);
#ifndef NO_DDR
putstr ("DDR Init\n");
led(0x042);
ddr_init ();
#endif /* NO_DDR */
putstr ("GDB Stub for HS-2J0 SH2 ROM\n");
putstr (version_string);
led(0x50);
}

557
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/*
Copyright (c) 2001 by William A. Gatliff
All rights reserved. bgat@billgatliff.com
See the file COPYING for details.
This file is provided "as-is", and without any express
or implied warranties, including, without limitation,
the implied warranties of merchantability and fitness
for a particular purpose.
The author welcomes feedback regarding this file.
*/
/* $Id$ */
/*
This is code for the Hitachi SH-2 processor family. Stepping is
done via code disassembly and replacement of TRAP opcodes, which
means that you can't step code that lives in flash.
*/
#include "gdb.h"
#include "sh2.h"
typedef enum {
R0 = 0, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15,
PC, PR, GBR, VBR, MACH, MACL, SR
} register_id_E;
typedef struct {
unsigned long pr;
unsigned long gbr;
unsigned long *vbr;
unsigned long mach;
unsigned long macl;
unsigned long r[16];
unsigned long pc;
unsigned long sr;
} register_file_S;
static register_file_S register_file;
short gdb_sh2_stepped_opcode;
/* stuff for stepi */
#define OPCODE_BT(op) (((op) & 0xff00) == 0x8900)
#define OPCODE_BF(op) (((op) & 0xff00) == 0x8b00)
#define OPCODE_BTF_DISP(op) \
(((op) & 0x80) ? (((op) | 0xffffff80) << 1) : (((op) & 0x7f ) << 1))
#define OPCODE_BFS(op) (((op) & 0xff00) == 0x8f00)
#define OPCODE_BTS(op) (((op) & 0xff00) == 0x8d00)
#define OPCODE_BRA(op) (((op) & 0xf000) == 0xa000)
#define OPCODE_BRA_DISP(op) \
(((op) & 0x800) ? (((op) | 0xfffff800) << 1) : (((op) & 0x7ff) << 1))
#define OPCODE_BRAF(op) (((op) & 0xf0ff) == 0x0023)
#define OPCODE_BRAF_REG(op) (((op) & 0x0f00) >> 8)
#define OPCODE_BSR(op) (((op) & 0xf000) == 0xb000)
#define OPCODE_BSR_DISP(op) \
(((op) & 0x800) ? (((op) | 0xfffff800) << 1) : (((op) & 0x7ff) << 1))
#define OPCODE_BSRF(op) (((op) & 0xf0ff) == 0x0003)
#define OPCODE_BSRF_REG(op) (((op) >> 8) & 0xf)
#define OPCODE_JMP(op) (((op) & 0xf0ff) == 0x402b)
#define OPCODE_JMP_REG(op) (((op) >> 8) & 0xf)
#define OPCODE_JSR(op) (((op) & 0xf0ff) == 0x400b)
#define OPCODE_JSR_REG(op) (((op) >> 8) & 0xf)
#define OPCODE_RTS(op) ((op) == 0xb)
#define OPCODE_RTE(op) ((op) == 0x2b)
#define OPCODE_TRAPA(op) (((op) & 0xff00) == 0xc300)
#define OPCODE_TRAPA_DISP(op) ((op) & 0x00ff)
#define SR_T_BIT_MASK 0x1
#define STEP_OPCODE 0xc320
/*
Analyzes the next instruction, to see where the program
will go to when it runs. Returns the destination address.
*/
static long get_stepi_dest (void)
{
short op = *(short*)register_file.pc;
long addr = register_file.pc + 2;
/* BT, BT/S (untested!), BF and BF/S (untested!)
TODO: test delay-slot branches */
if (((OPCODE_BT(op) || OPCODE_BTS(op))
&& (register_file.sr & SR_T_BIT_MASK))
|| ((OPCODE_BF(op) || OPCODE_BFS(op))
&& !(register_file.sr & SR_T_BIT_MASK)))
{
/* we're taking the branch */
/* per 6.12 of the SH1/SH2 programming manual,
PC+disp is address of the second instruction
after the branch instruction, so we have to add 4 */
/* TODO: spend more time understanding this magic */
addr = register_file.pc + 4 + OPCODE_BTF_DISP(op);
}
/* BRA */
else if (OPCODE_BRA(op))
addr = register_file.pc + 4 + OPCODE_BRA_DISP(op);
/* BRAF */
else if (OPCODE_BRAF(op))
addr = register_file.pc + 4
+ register_file.r[OPCODE_BRAF_REG(op)];
/* BSR */
else if (OPCODE_BSR(op))
addr = register_file.pc + 4 + OPCODE_BSR_DISP(op);
/* BSRF */
else if (OPCODE_BSRF(op))
addr = register_file.pc + 4
+ register_file.r[OPCODE_BSRF_REG(op)];
/* JMP */
else if (OPCODE_JMP(op))
addr = register_file.r[OPCODE_JMP_REG(op)];
/* JSR */
else if (OPCODE_JSR(op))
addr = register_file.r[OPCODE_JSR_REG(op)];
/* RTS */
else if (OPCODE_RTS(op))
addr = register_file.pr;
/* RTE */
else if (OPCODE_RTE(op))
addr = *(unsigned long*)(register_file.r[15]);
/* TRAPA */
else if (OPCODE_TRAPA(op))
addr = register_file.vbr[OPCODE_TRAPA_DISP(op)];
return addr;
}
/*
Uses a TRAP to generate an exception
after we run the next instruction.
*/
void gdb_step (long addr)
{
long dest_addr;
if (addr)
register_file.pc = addr;
/* determine where the step will take us */
dest_addr = get_stepi_dest();
/* save the target opcode, replace with STEP_OPCODE */
gdb_sh2_stepped_opcode = *(short*)dest_addr;
*(short*)dest_addr = STEP_OPCODE;
gdb_return_from_exception();
return;
}
/*
Retrieves a register value from gdb_register_file. Returns the size
of the register, in bytes, or zero if an invalid id is specified
(which *will* happen--- gdb.c uses this functionality to tell how
many registers we actually have).
*/
int gdb_peek_register_file (int id, long* val)
{
/* all our registers are longs */
int retval = sizeof(long);
switch (id)
{
case R0: case R1: case R2: case R3:
case R4: case R5: case R6: case R7:
case R8: case R9: case R10: case R11:
case R12: case R13: case R14: case R15:
*val = register_file.r[id];
break;
case PC: *val = register_file.pc; break;
case PR: *val = register_file.pr; break;
case GBR: *val = register_file.gbr; break;
case VBR: *val = (long)register_file.vbr; break;
case MACH: *val = register_file.mach; break;
case MACL: *val = register_file.macl; break;
case SR: *val = register_file.sr; break;
default: retval = 0;
}
return retval;
}
#define PORT (*(volatile unsigned long *)0xabcd0000)
/*
Stuffs a register value into gdb_register_file. Returns the size of
the register, in bytes, or zero if an invalid id is specified.
*/
int gdb_poke_register_file (int id, long val)
{
/* all our registers are longs */
int retval = sizeof(long);
switch( id )
{
case R0: case R1: case R2: case R3:
case R4: case R5: case R6: case R7:
case R8: case R9: case R10: case R11:
case R12: case R13: case R14: case R15:
register_file.r[id] = val;
break;
case PC: register_file.pc = val; break;
case PR: register_file.pr = val; break;
case GBR: register_file.gbr = val; break;
case VBR: register_file.vbr = (void *)val; break;
case MACH: register_file.mach = val; break;
case MACL: register_file.macl = val; break;
case SR: register_file.sr = val; break;
default: retval = 0;
}
return retval;
}
/*
Releases the application to run.
*/
void gdb_continue (long addr)
{
if (addr) register_file.pc = addr;
gdb_return_from_exception();
return;
}
/*
The stub calls this before dropping into the monitor, to give us a
chance to clean things like software stepping up.
*/
void gdb_monitor_onentry (void)
{
/* if we're stepping, then undo the step */
if (gdb_sh2_stepped_opcode)
{
*(short*)register_file.pc = gdb_sh2_stepped_opcode;
gdb_sh2_stepped_opcode = 0;
}
return;
}
/*
Catches TRAPA #34 calls from newlib and other runtime library
stubs. Currently only handles SYS_write.
TODO: fix magic numbers.
*/
int gdb_trapa34 (int syscall, int arg1, int arg2, int arg3)
{
return gdb_file_io(syscall, arg1, arg2, arg3);
}
static int i_cnt = 50; /* toggle LED 2Hz */
static int led = 0;
void gdb_pit ()
{
if (!(i_cnt--)) {
i_cnt = 50;
if (!led) PORT = led = 0x088;
else PORT = led = 0x000;
}
}
void gdb_flush_cache (void *start, int len) { return; }
__asm__(
".section .text\n"
"save_registers_handle_exception:\n"
/*
Generic code to save processor context.
Assumes the stack looks like this:
sigval<-r15
r1
r0
pc
sr
*/
/* find end of register_file */
" mov.l register_file_end, r0\n"
/* copy sr to register file */
" mov.l @(16, r15), r1\n"
" mov.l r1, @r0\n"
/* copy pc to register file */
" mov.l @(12, r15), r1\n"
" mov.l r1, @-r0\n"
/* sigval, r1, r0, pc, sr are already on the stack, */
/* so r15 isn't the same as it was immediately before */
/* we took the current exception. We have to adjust */
/* r15 in the register file so that gdb gets the right */
/* stack pointer value */
" mov r15, r1\n"
" add #20, r1\n"
" mov.l r1, @-r0\n"
/* save r14-r2 */
" mov.l r14, @-r0\n"
" mov.l r13, @-r0\n"
" mov.l r12, @-r0\n"
" mov.l r11, @-r0\n"
" mov.l r10, @-r0\n"
" mov.l r9, @-r0\n"
" mov.l r8, @-r0\n"
" mov.l r7, @-r0\n"
" mov.l r6, @-r0\n"
" mov.l r5, @-r0\n"
" mov.l r4, @-r0\n"
" mov.l r3, @-r0\n"
" mov.l r2, @-r0\n"
/* copy r1 to register file */
" mov.l @(4, r15), r1\n"
" mov.l r1, @-r0\n"
/* copy r0 to register file */
" mov.l @(8, r15), r1\n"
" mov.l r1, @-r0\n"
/* save macl, mach, vbr, gbr, pr in register file */
" sts.l macl, @-r0\n"
" sts.l mach, @-r0\n"
" stc.l vbr, @-r0\n"
" stc.l gbr, @-r0\n"
" sts.l pr, @-r0\n"
/* call gdb_handle_exception */
" mov.l handle_exception, r0\n"
" mov.l @r15, r4\n"
" jsr @r0\n"
" nop\n"
" .align 2\n"
" handle_exception: .long _gdb_handle_exception\n"
" register_file_end: .long _register_file+88\n"
/*
TRAPA #32 (breakpoint) isr.
Sends a SIGTRAP to gdb_handle_exception().
Because we always subtract 2 from the pc
stacked during exception processing, this
function won't permit compiled-in breakpoints.
If you compile a TRAPA #32 into the code, we'll
loop on it indefinitely. Use TRAPA #33 instead.
*/
".section .text\n"
".global _gdb_trapa32_isr\n"
"_gdb_trapa32_isr:\n"
/* put r0, r1 on the stack */
" mov.l r0, @-r15\n"
" mov.l r1, @-r15\n"
/* disable interrupts */
" mov #0xf0, r0\n"
" ldc r0, sr\n"
/* put SIGTRAP on stack */
" mov #5, r0\n"
" mov.l r0, @-r15\n"
/* fudge pc, so we re-execute the instruction replaced
by the trap; this breaks compiled-in breakpoints! */
" mov.l @(12, r15), r0\n"
" add #-2, r0\n"
" mov.l r0, @(12, r15)\n"
/* save registers, call gdb_handle_exception */
" bra save_registers_handle_exception\n"
" nop\n"
".section .text\n"
".global _gdb_trapa33_isr\n"
"_gdb_trapa33_isr:\n"
" mov.l r0, @-r15\n"
" mov #0xf0, r0\n"
" ldc r0, sr\n"
" mov.l r1, @-r15\n"
" mov #5, r0\n"
" mov.l r0, @-r15\n"
" bra save_registers_handle_exception\n"
" nop\n"
/*
PIT
*/
".section .text\n"
".global _gdb_my_isr\n"
"_gdb_my_isr:\n"
" sts.l pr,@-r15\n"
" bsr _gdb_pit\n"
" nop\n"
" lds.l @r15+, pr\n"
" rte\n"
" nop\n"
/*
TRAPA #34 handler. Used by newlib et al for system calls. We
include it here so that printf() and family get automagically bound
to gdb_console_write().
*/
".section .text\n"
".global _gdb_trapa34_isr\n"
"_gdb_trapa34_isr:\n"
" sts.l pr,@-r15\n"
" bsr _gdb_trapa34\n"
" nop\n"
" lds.l @r15+, pr\n"
" rte\n"
" nop\n"
".section .text\n"
".global _gdb_unhandled_isr\n"
"_gdb_unhandled_isr:\n"
" mov.l r0, @-r15\n"
" mov #0xf0, r0\n"
" ldc r0, sr\n"
" mov.l r1, @-r15\n"
" mov #30, r0\n"
" mov.l r0, @-r15\n"
" bra save_registers_handle_exception\n"
" nop\n"
".section .text\n"
".global _gdb_nmi_isr\n"
"_gdb_nmi_isr:\n"
" mov.l r0, @-r15\n"
" mov #0xf0, r0\n"
" ldc r0, sr\n"
" mov.l r1, @-r15\n"
" mov #2, r0\n"
" mov.l r0, @-r15\n"
" bra save_registers_handle_exception\n"
" nop\n"
".section .text\n"
".global _gdb_illegalinst_isr\n"
"_gdb_illegalinst_isr:\n"
" mov.l r0, @-r15\n"
" mov #0xf0, r0\n"
" ldc r0, sr\n"
" mov.l r1, @-r15\n"
" mov #4, r0\n"
" mov.l r0, @-r15\n"
" bra save_registers_handle_exception\n"
" nop\n"
".section .text\n"
".global _gdb_addresserr_isr\n"
"_gdb_addresserr_isr:\n"
" mov.l r0, @-r15\n"
" mov #0xf0, r0\n"
" ldc r0, sr\n"
" mov.l r1, @-r15\n"
" mov #11, r0\n"
" mov.l r0, @-r15\n"
" bra save_registers_handle_exception\n"
" nop\n"
/* Restores registers to the values specified in register_file. */
".section .text\n"
".global _gdb_return_from_exception\n"
"_gdb_return_from_exception:\n"
/* find register_file */
" mov.l register_file, r0\n"
" lds.l @r0+, pr\n"
" ldc.l @r0+, gbr\n"
" ldc.l @r0+, vbr\n"
" lds.l @r0+, mach\n"
" lds.l @r0+, macl\n"
/* skip r0 and r1 for now,
since we're using them */
" add #8, r0\n"
" mov.l @r0+, r2\n"
" mov.l @r0+, r3\n"
" mov.l @r0+, r4\n"
" mov.l @r0+, r5\n"
" mov.l @r0+, r6\n"
" mov.l @r0+, r7\n"
" mov.l @r0+, r8\n"
" mov.l @r0+, r9\n"
" mov.l @r0+, r10\n"
" mov.l @r0+, r11\n"
" mov.l @r0+, r12\n"
" mov.l @r0+, r13\n"
" mov.l @r0+, r14\n"
" mov.l @r0+, r15\n"
/* put sr onto stack */
" mov.l @(4,r0), r1\n"
" mov.l r1, @-r15\n"
/* put pc onto stack */
" mov.l @r0, r1\n"
" mov.l r1, @-r15\n"
/* restore r1, r0 */
" add #-64, r0\n"
" mov.l @(4,r0), r1\n"
" mov.l @r0, r0\n"
" rte\n"
" nop\n"
".align 2\n"
" register_file: .long _register_file\n"
/* "kill" and "detach" try to simulate a reset */
".section .text\n"
".global _gdb_kill\n"
".global _gdb_detach\n"
"_gdb_kill:\n"
"_gdb_detach:\n"
" mov #4, r15\n"
" mov.l @r15, r15\n"
" mov #0, r0\n"
" mov.l @r0, r0\n"
" jmp @r0\n"
" nop\n"
);

31
testrom/sh2.h Normal file
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@@ -0,0 +1,31 @@
/*
Copyright (c) 2001 by William A. Gatliff
All rights reserved. bgat@billgatliff.com
See the file COPYING for details.
This file is provided "as-is", and without any express
or implied warranties, including, without limitation,
the implied warranties of merchantability and fitness
for a particular purpose.
The author welcomes feedback regarding this file.
*/
/* $Id$ */
#if !defined(SH2_H_INCLUDED)
#define SH2_H_INCLUDED
extern short gdb_sh2_stepped_opcode;
extern void gdb_unhandled_isr (void);
extern void gdb_trapa32_isr (void);
extern void gdb_trapa33_isr (void);
extern void gdb_trapa34_isr (void);
extern void gdb_illegalinst_isr (void);
extern void gdb_addresserr_isr (void);
#endif /* SH2_H_INCLUDED */

57
testrom/startup/sh.x Normal file
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/**************************************
SuperH (SH-2) C Compiler Linker Script
**************************************/
OUTPUT_FORMAT("elf32-sh")
OUTPUT_ARCH(sh)
MEMORY
{
ram : o = 0x00000000, l = 0x3b00
stack : o = 0x00003d00, l = 0x0300
}
SECTIONS
{
.text : {
*(.vect)
*(.text)
*(.strings)
_etext = . ;
} > ram
.tors : {
___ctors = . ;
*(.ctors)
___ctors_end = . ;
___dtors = . ;
*(.dtors)
___dtors_end = . ;
} > ram
.rodata : {
*(.rodata*)
} >ram
__idata_start = ADDR(.text) + SIZEOF(.text) + SIZEOF(.tors) + SIZEOF(.rodata);
.data : AT(__idata_start) {
__idata_start = .;
_sdata = . ;
*(.data)
_edata = . ;
} > ram
__idata_end = __idata_start + SIZEOF(.data);
.bss : {
_bss_start = .;
*(.bss)
*(COMMON)
_end = .;
} >ram
.stack :
{
_stack = .;
*(.stack)
} > stack
}

57
testrom/startup/sh32.x Normal file
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@@ -0,0 +1,57 @@
/**************************************
SuperH (SH-2) C Compiler Linker Script
**************************************/
OUTPUT_FORMAT("elf32-sh")
OUTPUT_ARCH(sh)
MEMORY
{
ram : o = 0x00000000, l = 0x1c00
stack : o = 0x00001ffc, l = 0x03fc
}
SECTIONS
{
.text : {
*(.vect)
*(.text)
*(.strings)
_etext = . ;
} > ram
.tors : {
___ctors = . ;
*(.ctors)
___ctors_end = . ;
___dtors = . ;
*(.dtors)
___dtors_end = . ;
} > ram
.rodata : {
*(.rodata*)
} >ram
__idata_start = ADDR(.text) + SIZEOF(.text) + SIZEOF(.tors) + SIZEOF(.rodata);
.data : AT(__idata_start) {
__idata_start = .;
_sdata = . ;
*(.data)
_edata = . ;
} > ram
__idata_end = __idata_start + SIZEOF(.data);
.bss : {
_bss_start = .;
*(.bss)
*(COMMON)
_end = .;
} >ram
.stack :
{
_stack = .;
*(.stack)
} > stack
}

12
testrom/syscalls.h Normal file
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#ifndef __GDBSTUB_UNISTD_H__
#define __GDBSTUB_UNISTD_H__
#define __NR_open 1
#define __NR_close 2
#define __NR_read 3
#define __NR_write 4
#define __NR_lseek 5
#define __NR_syscalls 5
#endif /* __GDBSTUB_UNISTD_H__ */

750
testrom/tests/testalu.s Normal file
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/**************
Initialization
**************/
.global _testalu
_testalu:
mov.l _pfail, r13 !fail address
bra _testgo
nop
.align 4
_pfail: .long _fail
_testgo:
/*************
EXTU.B Rm, Rn
EXTU.W Rm, Rn
EXTS.B Rm, Rn
EXTS.W Rm, Rn
*************/
mov.l _p11223344, r0
extu.b r0, r2
extu.w r0, r4
exts.b r0, r6
exts.w r0, r8
mov.l _p00000044, r1
mov.l _p00003344, r3
mov.l _p00000044, r5
mov.l _p00003344, r7
cmp/eq r1, r2
bf _extfail
cmp/eq r3, r4
bf _extfail
cmp/eq r5, r6
bf _extfail
cmp/eq r7, r8
bf _extfail
mov.l _paabbccdd, r0
extu.b r0, r2
extu.w r0, r4
exts.b r0, r6
exts.w r0, r8
mov.l _p000000dd, r1
mov.l _p0000ccdd, r3
mov.l _pffffffdd, r5
mov.l _pffffccdd, r7
cmp/eq r1, r2
bf _extfail
cmp/eq r3, r4
bf _extfail
cmp/eq r5, r6
bf _extfail
cmp/eq r7, r8
bf _extfail
bra _extpass
nop
_extfail:
jmp @r13
nop
.align 4
_p11223344 : .long 0x11223344
_paabbccdd : .long 0xaabbccdd
_p00000044 : .long 0x00000044
_p00003344 : .long 0x00003344
_p000000dd : .long 0x000000dd
_p0000ccdd : .long 0x0000ccdd
_pffffffdd : .long 0xffffffdd
_pffffccdd : .long 0xffffccdd
_extpass :
/***********
NEGC Rm, Rn
***********/
clrt !negate 64bit value
mov #0x00, r4 !upper 32bit
mov #0x01, r2 !lower 32bit
negc r2, r6
bt .+6
jmp @r13
nop
negc r4, r8
bt .+6
jmp @r13
nop
mov #0xff, r4
mov #0xff, r2
cmp/eq r8, r4
bt .+6
jmp @r13
nop
cmp/eq r6, r2
bt .+6
jmp @r13
nop
clrt
mov #0x00, r2
negc r2, r0
bf .+6
jmp @r13
nop
cmp/eq #0x00, r0
bt .+6
jmp @r13
nop
/**********
NEG Rm, Rn
**********/
mov #127, r2
neg r2, r0
cmp/eq #-127, r0
bt .+6
jmp @r13
nop
mov #-128, r2
neg r2, r0
mov.l _p00000080, r4
cmp/eq r4, r0
bt .+6
jmp @r13
nop
bra _negpass
nop
.align 4
_p00000080 : .long 0x00000080
_negpass :
/*************
SWAP.B Rm, Rn
SWAP.W Rm, Rn
*************/
mov.l _p00112233, r2
swap.b r2, r4
swap.w r2, r6
mov.l _p00113322, r8
mov.l _p22330011, r10
cmp/eq r8, r4
bt .+6
jmp @r13
nop
cmp/eq r10, r6
bt .+6
jmp @r13
nop
/**********
NOT Rm, Rn
**********/
mov #0xaa, r2
not r2, r0
cmp/eq #0x55, r0
bt .+6
jmp @r13
nop
/*********
TAS.B @Rn
*********/
mov.l _pram0, r1
mov #0x55, r0
mov.b r0, @r1
tas.b @r1
bf .+6
jmp @r13
nop
mov.b @r1, r0
cmp/eq #0xd5, r0
bt .+6
jmp @r13
nop
mov #0x00, r0
mov.b r0, @r1
tas.b @r1
bt .+6
jmp @r13
nop
mov.b @r1, r0
cmp/eq #0x80, r0
bt .+6
jmp @r13
nop
/*****
DT Rn
*****/
mov #0, r2
mov #10, r6
_loop_dt:
add r6, r2
dt r6
bf _loop_dt
mov r2, r0
cmp/eq #55, r0
bt .+6
jmp @r13
nop
/***********
SUBV Rm, Rn
***********/
mov #0x7e, r0
mov #0x7f, r2
subv r2, r0
bf .+6
jmp @r13
nop
cmp/eq #0xff, r0
bt .+6
jmp @r13
nop
mov.l _p80000000, r0
mov #0x01, r2
subv r2, r0
bt .+6
jmp @r13
nop
mov.l _p7fffffff, r2
cmp/eq r2, r0
bt .+6
jmp @r13
nop
mov.l _p7fffffff, r0
mov #0xff, r2
subv r2, r0
bt .+6
jmp @r13
nop
mov.l _p80000000, r2
cmp/eq r2, r0
bt .+6
jmp @r13
nop
/***********
SUBC Rm, Rn
***********/
clrt
mov #0x01, r0
mov #0x02, r1
subc r1, r0
bt .+6
jmp @r13
nop
cmp/eq #0xff, r0
bt .+6
jmp @r13
nop
sett
mov #0x04, r0
mov #0x02, r1
subc r1, r0
bf .+6
jmp @r13
nop
cmp/eq #0x01, r0
bt .+6
jmp @r13
nop
/**********
SUB Rm, Rn
**********/
mov #86, r0
mov #127, r1
sub r1, r0
cmp/eq #(86-127), r0
bt .+6
jmp @r13
nop
/************
ADD #imm, R0
************/
mov #0x12, r0
add #0x34, r0
cmp/eq #0x46, r0
bt .+6
jmp @r13
nop
add #1, r0
cmp/eq #0x47, r0
bt .+6
jmp @r13
nop
/***********
ADDV Rm, Rn
***********/
mov #0xff, r0
mov #0x01, r2
addv r2, r0
bf .+6
jmp @r13
nop
cmp/eq #0x00, r0
bt .+6
jmp @r13
nop
mov.l _p7fffffff, r0
mov #0x01, r2
addv r2, r0
bt .+6
jmp @r13
nop
mov.l _p80000000, r2
cmp/eq r2, r0
bt .+6
jmp @r13
nop
mov.l _p80000000, r0
mov #0xff, r2
addv r2, r0
bt .+6
jmp @r13
nop
mov.l _p7fffffff, r2
cmp/eq r2, r0
bt .+6
jmp @r13
nop
/***********
ADDC Rm, Rn
***********/
clrt
mov #0xff, r0
mov #0x01, r1
addc r1, r0
bt .+6
jmp @r13
nop
cmp/eq #0x00, r0
bt .+6
jmp @r13
nop
sett
mov #0xfd, r0
mov #0x01, r1
addc r1, r0
bf .+6
jmp @r13
nop
cmp/eq #0xff, r0
bt .+6
jmp @r13
nop
/**********
ADD Rm, Rn
**********/
mov #89, r0
mov #-128, r1
add r1, r0
cmp/eq #(89-128), r0
bt .+6
jmp @r13
nop
/************
XTRCT Rm, Rn
************/
mov.l _p00112233, r2
mov.l _p44556677, r4
xtrct r4, r2
mov.l _p66770011, r6
cmp/eq r6, r2
bt .+6
jmp @r13
nop
/**********
XOR Rm, Rn
**********/
mov #0xaa, r0
mov #0x55, r2
xor r2, r0
tst #0x00, r0
bt .+6
jmp @r13
nop
mov #0xaa, r0 ! 1010
mov #0x77, r2 ! 0111
xor r2, r0
cmp/eq #0xdd, r0 ! 1101
bt .+6
jmp @r13
nop
/************
XOR #imm, R0
************/
mov #0xaa, r0
xor #0x55, r0
cmp/eq #0xff, r0
bt .+6
jmp @r13
nop
mov #0xaa, r0 ! 1010
xor #0x77, r0 ! 0111
cmp/eq #0xdd, r0 ! 1101
bt .+6
jmp @r13
nop
/**********************
XOR.B #imm, @(R0, GBR)
**********************/
mov.l _pram0, r1
ldc r1, gbr
mov #0xaa, r0
mov.b r0, @(7, r1)
mov #7, r0
xor.b #0x55, @(r0, gbr)
mov.b @(7, r1), r0
cmp/eq #0xff, r0
bt .+6
jmp @r13
nop
!----
mov #0xaa, r0
mov.b r0, @(7, r1)
mov #7, r0
xor.b #0x77, @(r0, gbr)
mov.b @(7, r1), r0
cmp/eq #0xdd, r0
bt .+6
jmp @r13
nop
/**********
TST Rm, Rn
**********/
mov #0xaa, r2
mov #0x55, r4
tst r4, r2
movt r0
cmp/eq #0x01, r0
bt .+6
jmp @r13
nop
mov #0xaa, r2
mov #0x5d, r4
tst r4, r2
movt r0
cmp/eq #0x00, r0
bt .+6
jmp @r13
nop
/************
TST #imm, R0
************/
mov #0xaa, r0
tst #0x55, r0
movt r0
cmp/eq #0x01, r0
bt .+6
jmp @r13
nop
mov #0xaa, r0
tst #0xd5, r0
movt r0
cmp/eq #0x00, r0
bt .+6
jmp @r13
nop
/**********************
TST.B #imm, @(R0, GBR)
**********************/
mov.l _pram0, r1
ldc r1, gbr
mov #0xaa, r0
mov.b r0, @(9, r1)
mov #9, r0
clrt
tst.b #0x55, @(r0, gbr)
bt .+6
jmp @r13
nop
mov #0xaa, r0
mov.b r0, @(11, r1)
mov #11, r0
sett
tst.b #0xd5, @(r0, gbr)
bf .+6
jmp @r13
nop
/**********
AND Rm, Rn
**********/
mov #0x00, r0
mov #0xff, r1
and r1, r0
cmp/eq #0x00, r0
bt .+6
jmp @r13
nop
!----
mov #0xaa, r0
mov #0x55, r1
and r1, r0
cmp/eq #0x00, r0
bt .+6
jmp @r13
nop
!----
mov #0x7e, r0 !01111110
mov #0xdb, r1 !11011011
and r1, r0
cmp/eq #0x5a, r0 !01011010
bt .+6
jmp @r13
nop
/************
AND #imm, R0
************/
mov #0x00, r0
and #0xff, r0
cmp/eq #0x00, r0
bt .+6
jmp @r13
nop
!----
mov #0xaa, r0
and #0x55, r0
cmp/eq #0x00, r0
bt .+6
jmp @r13
nop
!----
mov #0x7e, r0 !01111110
and #0xdb, r0 !11011011
cmp/eq #0x5a, r0 !01011010
bt .+6
jmp @r13
nop
/**********************
AND.B #imm, @(R0, GBR)
**********************/
mov.l _pram0, r1
ldc r1, gbr
mov #0x00, r0
mov.b r0, @(7, r1)
mov #7, r0
and.b #0xff, @(r0, gbr)
mov.b @(7, r1), r0
cmp/eq #0x00, r0
bt .+6
jmp @r13
nop
!----
mov #0xaa, r0
mov.b r0, @(7, r1)
mov #7, r0
and.b #0x55, @(r0, gbr)
mov.b @(7, r1), r0
cmp/eq #0x00, r0
bt .+6
jmp @r13
nop
!----
mov #0x7e, r0 !01111110
mov.b r0, @(7, r1)
mov #7, r0
and.b #0xdb, @(r0, gbr) !11011011
mov.b @(7, r1), r0
cmp/eq #0x5a, r0 !01011010
bt .+6
jmp @r13
nop
/*********
OR Rm, Rn
*********/
mov #0x00, r0
mov #0xff, r1
or r1, r0
cmp/eq #0xff, r0
bt .+6
jmp @r13
nop
!----
mov #0xaa, r0
mov #0x55, r1
or r1, r0
cmp/eq #0xff, r0
bt .+6
jmp @r13
nop
!----
mov #0x55, r0 !01010101
mov #0x5a, r1 !01011010
or r1, r0
cmp/eq #0x5f, r0 !01011111
bt .+6
jmp @r13
nop
/***********
OR #imm, R0
***********/
mov #0x00, r0
or #0xff, r0
mov.w _p00ff, r2
cmp/eq r2, r0
bt .+6
jmp @r13
nop
!----
mov #0xaa, r0
or #0x55, r0
mov.w _pffff, r2
cmp/eq r2, r0
bt .+6
jmp @r13
nop
!----
mov #0x55, r0 !01010101
or #0x5a, r0 !01011010
cmp/eq #0x5f, r0 !01011111
bt .+6
jmp @r13
nop
/*********************
OR.B #imm, @(R0, GBR)
*********************/
mov.l _pram0, r1
ldc r1, gbr
mov #0x00, r0
mov.b r0, @(7, r1)
mov #7, r0
or.b #0xff, @(r0, gbr)
mov.b @(7, r1), r0
cmp/eq #0xff, r0
bt .+6
jmp @r13
nop
!----
mov #0xaa, r0
mov.b r0, @(7, r1)
mov #7, r0
or.b #0x55, @(r0, gbr)
mov.b @(7, r1), r0
cmp/eq #0xff, r0
bt .+6
jmp @r13
nop
!----
mov #0x55, r0
mov.b r0, @(7, r1)
mov #7, r0
or.b #0x5a, @(r0, gbr)
mov.b @(7, r1), r0
cmp/eq #0x5f, r0
bt .+6
jmp @r13
nop
/********
CLRT
SETT
MOVT Rn
********/
sett
movt r0
cmp/eq #0x01, r0
bt .+6
jmp @r13
nop
clrt
movt r0
cmp/eq #0x00, r0
bt .+6
jmp @r13
nop
/**************
Constant Table
**************/
bra _constantend
nop
.align 4
_pram0 : .long _ram0+128
_p7fffffff : .long 0x7fffffff
_p80000000 : .long 0x80000000
_p00112233 : .long 0x00112233
_p44556677 : .long 0x44556677
_p66770011 : .long 0x66770011
_p00113322 : .long 0x00113322
_p22330011 : .long 0x22330011
.align 2
_p00ff: .word 0x00ff
_pffff: .word 0xffff
.align 2
_constantend:
/**************
Congratulations
**************/
_pass:
mov.l _ppass_value, r0
mov.l _ppass_addr, r1
mov.l r0, @r1
rts
nop
.align 4
_ppass_addr: .long 0xABCD0000
_ppass_value: .long 0x00000031
/**********
You Failed
**********/
_fail:
mov.l _pfail_value, r0
mov.l _pfail_value, r1
bra _fail
nop
.align 4
_pfail_value: .long 0x88888888
.end

550
testrom/tests/testbra.s Normal file
View File

@@ -0,0 +1,550 @@
/**************
Initialization
**************/
.global _testbra
_testbra:
sts.l pr, @-r15
mov.l _pfail, r13 !fail address
bra _testgo
nop
.align 4
_pfail: .long _fail
_testgo:
/***********************
BRA and load contention
***********************/
mov #0x8b, r0
mov.l _pram0, r1
mov.l r0, @r1
nop
bra _bracont
mov.l @r1, r2
_bracont:
mov #-4, r1
and r1, r2
mov r2, r0
cmp/eq #0x88, r0
bt .+6
jmp @r13
nop
/************************
RTS and write contention
************************/
mov.l _prts_target, r1
lds r1, pr
mov #0xab, r0
mov.l r0, @-r15
mov.l r0, @-r15
mov.l r0, @-r15
mov.l r0, @-r15
mov.l r0, @-r15
mov.l r0, @-r15
mov.l r0, @-r15
mov.l r0, @-r15
sts.l pr, @-r15
lds r0, pr
lds.l @r15+, pr
mov.l @r15+, r1
mov.l @r15+, r2
mov.l @r15+, r3
mov.l @r15+, r4
mov.l @r15+, r5
mov.l @r15+, r6
mov.l @r15+, r7
rts
mov.l @r15+, r8
.align 4
_prts_target: .long _rts_target
_rts_target:
mov #0x12, r8
mov r8, r0
cmp/eq #0x12, r0
bt .+6
jmp @r13
nop
/********
BRA disp
BSR disp
********/
mov #126, r0
bra _bratarget
add #1, r0
_brareturn:
cmp/eq #0xaa, r0
bt .+6
jmp @r13
nop
mov #123, r0
bsr _bsrtarget
add #2, r0
cmp/eq #0x55, r0
bt .+6
jmp @r13
nop
bra _endbrabsr
nop
_bratarget:
cmp/eq #127, r0
bt .+6
jmp @r13
nop
bra _brareturn
mov #0xaa, r0
_bsrtarget:
cmp/eq #125, r0
bt .+6
jmp @r13
nop
rts
mov #0x55, r0
_endbrabsr:
/*******
JMP @Rn
JSR @Rn
*******/
mov.l _pjmptarget, r1
mov.l _pjsrtarget, r3
mov #126, r0
jmp @r1
add #1, r0
_jmpreturn:
cmp/eq #0xaa, r0
bt .+6
jmp @r13
nop
mov #123, r0
jsr @r3
add #2, r0
cmp/eq #0x55, r0
bt .+6
jmp @r13
nop
bra _endjmpjsr
nop
_jmptarget:
cmp/eq #127, r0
bt .+6
jmp @r13
nop
bra _jmpreturn
mov #0xaa, r0
_jsrtarget:
cmp/eq #125, r0
bt .+6
jmp @r13
nop
rts
mov #0x55, r0
.align 4
_pjmptarget: .long _jmptarget
_pjsrtarget: .long _jsrtarget
_endjmpjsr:
/*********
BT/S disp
BF/S disp
*********/
mov.l _pram0, r1
mov #0xa0, r0
mov.b r0, @(0, r1)
add #1, r0
mov.b r0, @(1, r1)
add #1, r0
mov.b r0, @(2, r1)
add #1, r0
mov.b r0, @(3, r1)
clrt
bt/s _btsfail
mov.b @(0, r1), r0
cmp/eq #0xa0, r0
bf _btsfail
clrt
bf/s _bts1
mov.b @(1, r1), r0
bra _btsfail
nop
_bts1:
cmp/eq #0xa1, r0
bf _btsfail
sett
bf/s _btsfail
mov.b @(2, r1), r0
cmp/eq #0xa2, r0
bf _btsfail
sett
bt/s _bts2
mov.b @(3, r1), r0
bra _btsfail
nop
_bts2:
cmp/eq #0xa3, r0
bt _btspass
_btsfail:
jmp @r13
nop
_btspass:
/*********************
Branch Subroutine Far
*********************/
mov #(target_bsrf - origin_bsrf), r0
mov #0xab, r1
mov.l _pram0, r2
bsrf r0
mov.l r1, @r2
origin_bsrf:
nop
nop
nop
mov.l @r2, r0
cmp/eq #0xac, r0
bt .+6
jmp @r13
nop
bra _bsrfend
nop
target_bsrf:
mov.l @r2, r1
add #1, r1
rts
mov.l r1, @r2
_bsrfend:
/**********
Branch Far
**********/
mov #(target_braf - origin_braf), r0
mov #0xab, r1
mov.l _pram0, r2
braf r0
mov.l r1, @r2
origin_braf:
nop
nop
nop
nop
nop
nop
jmp @r13
nop
target_braf:
mov.l @r2, r0
cmp/eq #0xab, r0
bt .+6
jmp @r13
nop
/******************************
Subroutine : Generic Operation
******************************/
_subroutine:
bsr _subtest
mov #0x12, r0
cmp/eq #0x12, r0
bt .+6
jmp @r13
nop
bra _subroutineend
nop
!----
_subtest:
mov.l r0, @-r15
sts.l pr, @-r15
bsr _subtest2
mov #0xab, r0
lds.l @r15+, pr
rts
mov.l @r15+, r0
!----
_subtest2:
mov.l r0, @-r15
sts.l pr, @-r15
mov #0x88, r0
lds.l @r15+, pr
rts
mov.l @r15+, r0
!----
_subroutineend:
/*****************
Compare and BT/BF
*****************/
_cmpbtbf:
mov.l _p12345678, r0
mov.l _p89abcdef, r1
cmp/eq r1, r0
bt .+4
bf .+6
jmp @r13
nop
!----
mov.l _p12345678, r1
cmp/eq r1, r0
bf .+4
bt .+6
jmp @r13
nop
/**************
Full CMP check
**************/
_compare:
mov #0xab, r0
cmp/eq #0xab, r0 !T=1
bf _cmpfail
cmp/eq #0xac, r0 !T=0
bt _cmpfail
!----
mov.l _p5a5a5a5a, r4
mov.l _p5a5a5a5a, r5
cmp/eq r5, r4 !T=1
bf _cmpfail
cmp/eq r4, r5 !T=1
bf _cmpfail
cmp/hs r5, r4 !T=1
bf _cmpfail
cmp/hs r4, r5 !T=1
bf _cmpfail
cmp/ge r5, r4 !T=1
bf _cmpfail
cmp/ge r4, r5 !T=1
bf _cmpfail
cmp/hi r5, r4 !T=0
bt _cmpfail
cmp/hi r4, r5 !T=0
bt _cmpfail
cmp/gt r5, r4 !T=0
bt _cmpfail
cmp/gt r4, r5 !T=0
bt _cmpfail
!----
mov.l _p5a5a5a5a, r4
mov.l _p4a5a5a5a, r5
cmp/eq r5, r4 !T=0
bt _cmpfail
cmp/eq r4, r5 !T=0
bt _cmpfail
cmp/hs r5, r4 !T=1
bf _cmpfail
cmp/hs r4, r5 !T=0
bt _cmpfail
cmp/ge r5, r4 !T=1
bf _cmpfail
cmp/ge r4, r5 !T=0
bt _cmpfail
cmp/hi r5, r4 !T=1
bf _cmpfail
cmp/hi r4, r5 !T=0
bt _cmpfail
cmp/gt r5, r4 !T=1
bf _cmpfail
cmp/gt r4, r5 !T=0
bt _cmpfail
!----
mov.l _p5a5a5a5a, r4
mov.l _paa5a5a5a, r5
cmp/eq r5, r4 !T=0
bt _cmpfail
cmp/eq r4, r5 !T=0
bt _cmpfail
cmp/hs r5, r4 !T=0
bt _cmpfail
cmp/hs r4, r5 !T=1
bf _cmpfail
cmp/ge r5, r4 !T=1
bf _cmpfail
cmp/ge r4, r5 !T=0
bt _cmpfail
cmp/hi r5, r4 !T=0
bt _cmpfail
cmp/hi r4, r5 !T=1
bf _cmpfail
cmp/gt r5, r4 !T=1
bf _cmpfail
cmp/gt r4, r5 !T=0
bt _cmpfail
!----
mov.l _p89abcdef, r4
mov.l _paa5a5a5a, r5
cmp/eq r5, r4 !T=0
bt _cmpfail
cmp/eq r4, r5 !T=0
bt _cmpfail
cmp/hs r5, r4 !T=0
bt _cmpfail
cmp/hs r4, r5 !T=1
bf _cmpfail
cmp/ge r5, r4 !T=0
bt _cmpfail
cmp/ge r4, r5 !T=1
bf _cmpfail
cmp/hi r5, r4 !T=0
bt _cmpfail
cmp/hi r4, r5 !T=1
bf _cmpfail
cmp/gt r5, r4 !T=0
bt _cmpfail
cmp/gt r4, r5 !T=1
bf _cmpfail
!----
sett
mov.l _p12345678, r4
mov.l _p12abcdef, r5
cmp/str r5, r4 !T=1
bf _cmpfail
cmp/str r4, r5 !T=1
bf _cmpfail
clrt
mov.l _p12345678, r4
mov.l _p12abcdef, r5
cmp/str r5, r4 !T=1
bf _cmpfail
cmp/str r4, r5 !T=1
bf _cmpfail
clrt
mov.l _p12345678, r4
mov.l _pab34cdef, r5
cmp/str r5, r4 !T=1
bf _cmpfail
cmp/str r4, r5 !T=1
bf _cmpfail
sett
mov.l _p12345678, r4
mov.l _pabcd56ef, r5
cmp/str r5, r4 !T=1
bf _cmpfail
cmp/str r4, r5 !T=1
bf _cmpfail
mov.l _p12345678, r4
mov.l _pabcdef78, r5
cmp/str r5, r4 !T=1
bf _cmpfail
cmp/str r4, r5 !T=1
bf _cmpfail
clrt
mov.l _p12345678, r4
mov.l _pabcdef01, r5
cmp/str r5, r4 !T=0
bt _cmpfail
cmp/str r4, r5 !T=0
bt _cmpfail
sett
mov.l _p12345678, r4
mov.l _pabcdef01, r5
cmp/str r5, r4 !T=0
bt _cmpfail
cmp/str r4, r5 !T=0
bt _cmpfail
sett
mov.l _pffffffff, r4
mov.l _p00000001, r5
cmp/str r5, r4 !T=0
bt _cmpfail
cmp/str r4, r5 !T=0
bt _cmpfail
!----
mov #0, r4
mov #1, r5
mov #-1, r6
cmp/pz r4 !T=1
bf _cmpfail
cmp/pz r5 !T=1
bf _cmpfail
cmp/pz r6 !T=0
bt _cmpfail
cmp/pl r4 !T=0
bt _cmpfail
cmp/pl r5 !T=1
bf _cmpfail
cmp/pl r6 !T=0
bt _cmpfail
!----
bra _cmpgood
nop
_cmpfail:
jmp @r13
nop
_cmpgood:
/**************
Constant Table
**************/
bra _constantend
nop
.align 4
_p12345678: .long 0x12345678
_p89abcdef: .long 0x89abcdef
_p5a5a5a5a: .long 0x5a5a5a5a
_paa5a5a5a: .long 0xaa5a5a5a
_p4a5a5a5a: .long 0x4a5a5a5a
_p12abcdef: .long 0x12abcdef
_pab34cdef: .long 0xab34cdef
_pabcd56ef: .long 0xabcd56ef
_pabcdef78: .long 0xabcdef78
_pabcdef01: .long 0xabcdef01
_p00000001: .long 0x00000001
_pffffffff: .long 0xffffffff
_pram0 : .long _ram0+128
.align 2
_constantend:
/**************
Congratulations
**************/
_pass:
lds.l @r15+, pr
mov.l _ppass_value, r0
mov.l _ppass_addr, r1
mov.l r0, @r1
rts
nop
.align 4
_ppass_addr: .long 0xABCD0000
_ppass_value: .long 0x00000012
/**********
You Failed
**********/
_fail:
mov.l _pfail_value, r0
mov.l _pfail_value, r1
bra _fail
nop
.align 4
_pfail_value: .long 0x88888888
.end

284
testrom/tests/testdiv.s Normal file
View File

@@ -0,0 +1,284 @@
/**************
Initialization
**************/
.global _testdiv
_testdiv:
sts.l pr, @-r15
mov.l _pfail, r13 !fail address
bra _testgo
nop
_pfail: .long _fail
_testgo:
mov.l _ptestvalue, r9
/******************************************
Unsigned R1(32bit) / R0(16bit) -> R1(16bit)
******************************************/
mov.l @r9+, r1
mov.l @r9+, r0
div0u
div1 r0, r1
div1 r0, r1
div1 r0, r1
div1 r0, r1
div1 r0, r1
div1 r0, r1
div1 r0, r1
div1 r0, r1
div1 r0, r1
div1 r0, r1
div1 r0, r1
div1 r0, r1
div1 r0, r1
div1 r0, r1
div1 r0, r1
div1 r0, r1
rotcl r1
mov.l @r9+, r2
cmp/eq r2, r1
bt .+6
jmp @r13
nop
/**********************************************
Unsigned R1:R2(64bit) / R0(32bit) -> R2(32bit)
**********************************************/
mov.l @r9+, r1
mov.l @r9+, r2
mov.l @r9+, r0
div0u
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
div1 r0,r1
rotcl r2
mov.l @r9+, r3
cmp/eq r3, r2
bt .+6
jmp @r13
nop
/*****************************************
Signed R1(16bit) / R0(16bit) -> R1(16bit)
*****************************************/
mov.l @r9+, r1
mov.l @r9+, r0
div0s r0, r1
div1 r0, r1
div1 r0, r1
div1 r0, r1
div1 r0, r1
div1 r0, r1
div1 r0, r1
div1 r0, r1
div1 r0, r1
div1 r0, r1
div1 r0, r1
div1 r0, r1
div1 r0, r1
div1 r0, r1
div1 r0, r1
div1 r0, r1
div1 r0, r1
mov.l @r9+, r2
cmp/eq r2, r1
bt .+6
jmp @r13
nop
/*****************************************
Signed R2(32bit) / R0(32bit) -> R2(32bit)
*****************************************/
mov.l @r9+, r1
mov.l @r9+, r2
mov.l @r9+, r0
div0s r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
div1 r0, r1
rotcl r2
mov.l @r9+, r3
cmp/eq r3, r2
bt .+6
jmp @r13
nop
!----
bra _testfinish
nop
!----
.align 4
_ptestvalue: .long _testvalue
_testvalue :
!----32 by 16 unsigned
.long 0x71c638e4
.long 0xaaaa0000
.long 0xaaacaaaa
!----64 by 32 unsigned
.long 0x0b00ea4e
.long 0x242d2080
.long 0x9abcdef0
.long 0x12345678
!----16 by 16 signed
.long 0xfffffeff !=ffffff00-1
.long 0x00100000
.long 0x000ffff7
!----32 by 32 signed
.long 0xffffffff
.long 0xdb97530f
.long 0xfffffffe
.long 0x12345678
_testfinish:
/**************
Congratulations
**************/
_pass:
lds.l @r15+, pr
mov.l _ppass_value, r0
mov.l _ppass_addr, r1
mov.l r0, @r1
rts
nop
.align 4
_ppass_addr: .long 0xABCD0000
_ppass_value: .long 0x00000051
/**********
You Failed
**********/
_fail:
mov.l _pfail_value, r0
mov.l _pfail_value, r1
bra _fail
nop
.align 4
_pfail_value: .long 0x88888888
.end

130
testrom/tests/testdmuls.s Normal file
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/**************
Initialization
**************/
.global _testdmuls
_testdmuls:
sts.l pr, @-r15
mov.l _pfail, r13 !fail address
bra _testgo
nop
_pfail: .long _fail
_testgo:
/************************
DMULS.L Rm, Rn
************************/
mov.l _ptestvalue1, r1
mov.l _ptestvalue2, r2
dmuls.l r2, r1
dmuls.l r1, r2
dmuls.l r2, r1
dmuls.l r1, r2 !You should check mult contention,here.
_testloop:
mov.l @r1+, r3
mov.l @r1+, r4
mov.l @r1+, r5
mov.l @r1+, r6
dmuls.l r4, r3
sts mach, r3 !You should check mult contention,here.
sts macl, r4
!----
cmp/eq r5, r3
bt .+6
jmp @r13
nop
!----
cmp/eq r6, r4
bt .+6
jmp @r13
nop
!----
cmp/eq r2, r1
bf _testloop
bra _testfinish
nop
!----
.align 4
_ptestvalue1: .long _testvalue1
_ptestvalue2: .long _testvalue2
.align 4
_testvalue1:
.long 0x00000002 !Rn
.long 0x00000003 !Rm
.long 0x00000000 !MACH
.long 0x00000006 !MACL
.long 0x12345678
.long 0x9abcdef0
.long 0xf8cc93d6
.long 0x242d2080
.long 0x00000001
.long 0xffffffff
.long 0xffffffff
.long 0xffffffff
.long 0xffffffff
.long 0x00000001
.long 0xffffffff
.long 0xffffffff
.long 0x7fffffff
.long 0x80000000
.long 0xc0000000
.long 0x80000000
.long 0x80000000
.long 0x7fffffff
.long 0xc0000000
.long 0x80000000
.long 0xffffffff
.long 0xffffffff
.long 0x00000000
.long 0x00000001
.long 0x7fffffff
.long 0x7fffffff
.long 0x3fffffff
.long 0x00000001
.long 0x80000000
.long 0x80000000
.long 0x40000000
.long 0x00000000
_testvalue2:
_testfinish:
/**************
Congratulations
**************/
_pass:
lds.l @r15+, pr
mov.l _ppass_value, r0
mov.l _ppass_addr, r1
mov.l r0, @r1
rts
nop
.align 4
_ppass_addr: .long 0xABCD0000
_ppass_value: .long 0x00000046
/**********
You Failed
**********/
_fail:
mov.l _pfail_value, r0
mov.l _pfail_value, r1
bra _fail
nop
.align 4
_pfail_value: .long 0x88888888
.end

130
testrom/tests/testdmulu.s Normal file
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/**************
Initialization
**************/
.global _testdmulu
_testdmulu:
sts.l pr, @-r15
mov.l _pfail, r13 !fail address
bra _testgo
nop
_pfail: .long _fail
_testgo:
/************************
DMULU.L Rm, Rn
************************/
mov.l _ptestvalue1, r1
mov.l _ptestvalue2, r2
dmulu.l r2, r1
dmulu.l r1, r2
dmulu.l r2, r1
dmulu.l r1, r2 !You should check mult contention,here.
_testloop:
mov.l @r1+, r3
mov.l @r1+, r4
mov.l @r1+, r5
mov.l @r1+, r6
dmulu.l r4, r3
sts mach, r3 !You should check mult contention,here.
sts macl, r4
!----
cmp/eq r5, r3
bt .+6
jmp @r13
nop
!----
cmp/eq r6, r4
bt .+6
jmp @r13
nop
!----
cmp/eq r2, r1
bf _testloop
bra _testfinish
nop
!----
.align 4
_ptestvalue1: .long _testvalue1
_ptestvalue2: .long _testvalue2
.align 4
_testvalue1:
.long 0x00000002 !Rn
.long 0x00000003 !Rm
.long 0x00000000 !MACH
.long 0x00000006 !MACL
.long 0x12345678
.long 0x9abcdef0
.long 0x0b00ea4e
.long 0x242d2080
.long 0x00000001
.long 0xffffffff
.long 0x00000000
.long 0xffffffff
.long 0xffffffff
.long 0x00000001
.long 0x00000000
.long 0xffffffff
.long 0x7fffffff
.long 0x80000000
.long 0x3FFFFFFF
.long 0x80000000
.long 0x80000000
.long 0x7fffffff
.long 0x3FFFFFFF
.long 0x80000000
.long 0xffffffff
.long 0xffffffff
.long 0xfffffffe
.long 0x00000001
.long 0x7fffffff
.long 0x7fffffff
.long 0x3fffffff
.long 0x00000001
.long 0x80000000
.long 0x80000000
.long 0x40000000
.long 0x00000000
_testvalue2:
_testfinish:
/**************
Congratulations
**************/
_pass:
lds.l @r15+, pr
mov.l _ppass_value, r0
mov.l _ppass_addr, r1
mov.l r0, @r1
rts
nop
.align 4
_ppass_addr: .long 0xABCD0000
_ppass_value: .long 0x00000045
/**********
You Failed
**********/
_fail:
mov.l _pfail_value, r0
mov.l _pfail_value, r1
bra _fail
nop
.align 4
_pfail_value: .long 0x88888888
.end

430
testrom/tests/testmacl.s Normal file
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/**************
Initialization
**************/
.global _testmacl
_testmacl:
sts.l pr, @-r15
mov.l _pfail, r13 !fail address
bra _testgo
nop
_pfail: .long _fail
_testgo:
/************************
MAC.L @Rm+, @Rn+ : basic
************************/
_macl:
mov #0, r0
ldc r0, sr !S=0
mov #0x02, r0
clrmac
mov.l _pmacldata1, r1
mov.l _pmacldata2, r2
mac.l @r2+, @r1+
ldc r0, sr !S=1, no effect to MAC operation
sts mach, r3
sts macl, r4
mov.l _pmacldata3, r5
mov.l @r5+, r6
mov.l @r5+, r7
!----
cmp/eq r6, r3
bt .+6
jmp @r13
nop
!----
cmp/eq r7, r4
bt .+6
jmp @r13
nop
!----
mov #0, r0
ldc r0, sr !S=0
mac.l @r2+, @r1+
clrmac !only check clear timing
!----
mac.l @r2+, @r1+
mac.l @r2+, @r1+
mac.l @r2+, @r1+
mac.l @r2+, @r1+
sts macl, r4
sts mach, r3
mov.l @r5+, r6
mov.l @r5+, r7
!----
cmp/eq r6, r3
bt .+6
jmp @r13
nop
!----
cmp/eq r7, r4
bt .+6
jmp @r13
nop
!----
bra _maclend
nop
.align 4
_macldata1:
.long 0x01234567 !19088743
.long 0xfffffffd !dummy (-3)
.long 0x00000002
.long 0x00000003
.long 0x00000004
.long 0x00000005
_macldata2:
.long 0x89abcdef !-1985229329
.long 0x00000002 !dummy (2)
.long 0x00000006
.long 0x00000007
.long 0x00000008
.long 0x00000009
_macldata3:
.long 0xff795e36 !-37895532457343447
.long 0xc94e4629
.long 0x00000000 !(2x6)+(3x7)+(4x8)+(5x9)=12+21+28+45=110
.long 0x0000006e
.align 4
_pmacldata1: .long _macldata1
_pmacldata2: .long _macldata2
_pmacldata3: .long _macldata3
_maclend:
/***********************************
MAC.L @Rm+, @Rn+ : value dependency
***********************************/
_macl_value:
mov.l _pmaclsbit, r1
mov.l _pmaclinih, r2
mov.l _pmaclinil, r3
mov.l _pmaclval1, r4
mov.l _pmaclval2, r5
mov.l _pmaclmach, r6
mov.l _pmaclmacl, r7
mov.l _pmaclcount, r8
_mac_value1:
mov.l @r1+, r0
ldc r0, sr
mov.l @r2+, r0
lds r0, mach
mov.l @r3+, r0
lds r0, macl
mac.l @r5+, @r4+
sts mach, r9
sts macl, r10
!----
mov.l @r6+, r0
cmp/eq r0, r9
bt .+6
jmp @r13
nop
!----
mov.l @r7+, r0
cmp/eq r0, r10
bt .+6
jmp @r13
nop
!----
add #-1, r8
cmp/pl r8
bt _mac_value1
!----
bra _macl_value_end:
nop
.align 4
!-----------------------------
! S=0 00000000 x 00000000
! S=0 00000001 x 7fffffff
! S=0 7fffffff x 00000001
! S=0 ffffffff x 7fffffff
! S=0 7fffffff x ffffffff
! S=0 00000001 x 80000000
! S=0 80000000 x 00000001
! S=0 ffffffff x 80000000
! S=0 80000000 x ffffffff
! S=0 7fffffff x 7fffffff
! S=0 80000000 x 80000000
! S=1 7fffffff x 7fffffff
! S=1 80000000 x 80000000
! S=0 7fffffff x 80000000
! S=0 80000000 x 7fffffff
! S=1 7fffffff x 80000000
! S=1 80000000 x 7fffffff
! S=0 00000001 x 00000001 + 00007fff:ffffffff
! S=0 00000001 x ffffffff + ffff8000:00000000
! S=1 00000001 x 00000001 + 00007fff:ffffffff
! S=1 00000001 x ffffffff + ffff8000:00000000
! S=1 00000001 x 00000001 + 0007ffff:ffffffff
! S=1 00000001 x ffffffff + fff80000:00000000
_maclsbit: ! R1
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000002 ! S=1
.long 0x00000002 ! S=1
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000002 ! S=1
.long 0x00000002 ! S=1
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000002 ! S=1
.long 0x00000002 ! S=1
.long 0x00000002 ! S=1
.long 0x00000002 ! S=1
_maclinih: ! R2
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00007fff
.long 0xffff8000
.long 0x00007fff
.long 0xffff8000
.long 0x0007ffff
.long 0xfff80000
_maclinil: ! R3
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0xffffffff
.long 0x00000000
.long 0xffffffff
.long 0x00000000
.long 0xffffffff
.long 0x00000000
_maclval1: ! R4
.long 0x00000000
.long 0x00000001
.long 0x7fffffff
.long 0xffffffff
.long 0x7fffffff
.long 0x00000001
.long 0x80000000
.long 0xffffffff
.long 0x80000000
.long 0x7fffffff
.long 0x80000000
.long 0x7fffffff
.long 0x80000000
.long 0x7fffffff
.long 0x80000000
.long 0x7fffffff
.long 0x80000000
.long 0x00000001
.long 0x00000001
.long 0x00000001
.long 0x00000001
.long 0x00000001
.long 0x00000001
_maclval2: ! R5
.long 0x00000000
.long 0x7fffffff
.long 0x00000001
.long 0x7fffffff
.long 0xffffffff
.long 0x80000000
.long 0x00000001
.long 0x80000000
.long 0xffffffff
.long 0x7fffffff
.long 0x80000000
.long 0x7fffffff
.long 0x80000000
.long 0x80000000
.long 0x7fffffff
.long 0x80000000
.long 0x7fffffff
.long 0x00000001
.long 0xffffffff
.long 0x00000001
.long 0xffffffff
.long 0x00000001
.long 0xffffffff
_maclmach: ! R6
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0xffffffff
.long 0xffffffff
.long 0xffffffff
.long 0xffffffff
.long 0x00000000
.long 0x00000000
.long 0x3fffffff
.long 0x40000000
.long 0x00007fff
.long 0x00007fff
.long 0xc0000000
.long 0xc0000000
.long 0xffff8000
.long 0xffff8000
.long 0x00008000
.long 0xffff7fff
.long 0x00007fff
.long 0xffff8000
.long 0x00007fff
.long 0xffff8000
_maclmacl: ! R7
.long 0x00000000
.long 0x7fffffff
.long 0x7fffffff
.long 0x80000001
.long 0x80000001
.long 0x80000000
.long 0x80000000
.long 0x80000000
.long 0x80000000
.long 0x00000001
.long 0x00000000
.long 0xffffffff
.long 0xffffffff
.long 0x80000000
.long 0x80000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0xffffffff
.long 0xffffffff
.long 0x00000000
.long 0xffffffff
.long 0x00000000
!-----------------------------
.align 4
_pmaclsbit: .long _maclsbit
_pmaclinih: .long _maclinih
_pmaclinil: .long _maclinil
_pmaclval1: .long _maclval1
_pmaclval2: .long _maclval2
_pmaclmach: .long _maclmach
_pmaclmacl: .long _maclmacl
_pmaclcount: .long (_maclinih - _maclsbit)/4
_macl_value_end:
/**************
Congratulations
**************/
_pass:
lds.l @r15+, pr
mov.l _ppass_value, r0
mov.l _ppass_addr, r1
mov.l r0, @r1
rts
nop
.align 4
_ppass_addr: .long 0xABCD0000
_ppass_value: .long 0x00000062
/**********
You Failed
**********/
_fail:
mov.l _pfail_value, r0
mov.l _pfail_value, r1
bra _fail
nop
.align 4
_pfail_value: .long 0x88888888
.end

430
testrom/tests/testmacw.s Normal file
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/**************
Initialization
**************/
.global _testmacw
_testmacw:
sts.l pr, @-r15
mov.l _pfail, r13 !fail address
bra _testgo
nop
_pfail: .long _fail
_testgo:
/************************
MAC.W @Rm+, @Rn+ : basic
************************/
_macw:
mov #0, r0
ldc r0, sr !S=0
mov #0x02, r0
clrmac
mov.l _pmacwdata1, r1
mov.l _pmacwdata2, r2
mac.w @r2+, @r1+
ldc r0, sr !S=1, no effect to MAC operation
sts mach, r3
sts macl, r4
mov.l _pmacwdata3, r5
mov.l @r5+, r6
mov.l @r5+, r7
!----
cmp/eq r6, r3
bt .+6
jmp @r13
nop
!----
cmp/eq r7, r4
bt .+6
jmp @r13
nop
!----
mov #0, r0
ldc r0, sr !S=0
mac.w @r2+, @r1+
clrmac !only check clear timing
!----
mac.w @r2+, @r1+
mac.w @r2+, @r1+
mac.w @r2+, @r1+
mac.w @r2+, @r1+
sts macl, r4
sts mach, r3
mov.l @r5+, r6
mov.l @r5+, r7
!----
cmp/eq r6, r3
bt .+6
jmp @r13
nop
!----
cmp/eq r7, r4
bt .+6
jmp @r13
nop
!----
bra _macwend
nop
.align 4
_macwdata1:
.word 0x1234 !4660
.word 0xfffd !dummy (-3)
.word 0x0002
.word 0x0003
.word 0x0004
.word 0x0005
_macwdata2:
.word 0xabcd !-21555
.word 0x0002 !dummy (2)
.word 0x0006
.word 0x0007
.word 0x0008
.word 0x0009
_macwdata3:
.long 0xFFFFFFFF !-100446300
.long 0xFA034FA4
.long 0x00000000 !(2x6)+(3x7)+(4x8)+(5x9)=12+21+28+45=110
.long 0x0000006e
.align 4
_pmacwdata1: .long _macwdata1
_pmacwdata2: .long _macwdata2
_pmacwdata3: .long _macwdata3
_macwend:
/***********************************
MAC.W @Rm+, @Rn+ : value dependency
***********************************/
_macw_value:
mov.l _pmacwsbit, r1
mov.l _pmacwinih, r2
mov.l _pmacwinil, r3
mov.l _pmacwval1, r4
mov.l _pmacwval2, r5
mov.l _pmacwmach, r6
mov.l _pmacwmacl, r7
mov.l _pmacwcount, r8
_mac_value1:
mov.l @r1+, r0
ldc r0, sr
mov.l @r2+, r0
lds r0, mach
mov.l @r3+, r0
lds r0, macl
mac.w @r5+, @r4+
sts mach, r9
sts macl, r10
!----
mov.l @r6+, r0
cmp/eq r0, r9
bt .+6
jmp @r13
nop
!----
mov.l @r7+, r0
cmp/eq r0, r10
bt .+6
jmp @r13
nop
!----
add #-1, r8
cmp/pl r8
bt _mac_value1
!----
bra _macw_value_end:
nop
.align 4
!-----------------------------
! S=0 0000 x 0000
! S=0 0001 x 7fff
! S=0 7fff x 0001
! S=0 ffff x 7fff
! S=0 7fff x ffff
! S=0 0001 x 8000
! S=0 8000 x 0001
! S=0 ffff x 8000
! S=0 8000 x ffff
! S=0 7fff x 7fff
! S=0 8000 x 8000
! S=1 7fff x 7fff
! S=1 8000 x 8000
! S=0 7fff x 8000
! S=0 8000 x 7fff
! S=1 7fff x 8000
! S=1 8000 x 7fff
! S=0 0001 x 0001 + 00000000:7fffffff
! S=0 0001 x ffff + ffffffff:80000000
! S=1 0001 x 0001 + 00000000:7fffffff
! S=1 0001 x ffff + ffffffff:80000000
! S=1 0001 x 0001 + 00000006:7fffffff
! S=1 0001 x ffff + 0000000a:80000000
_macwsbit: ! R1
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000002 ! S=1
.long 0x00000002 ! S=1
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000002 ! S=1
.long 0x00000002 ! S=1
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000002 ! S=1
.long 0x00000002 ! S=1
.long 0x00000002 ! S=1
.long 0x00000002 ! S=1
_macwinih: ! R2
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0xffffffff
.long 0x00000000
.long 0xffffffff
.long 0x00000006
.long 0x0000000a
_macwinil: ! R3
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x7fffffff
.long 0x80000000
.long 0x7fffffff
.long 0x80000000
.long 0x7fffffff
.long 0x80000000
_macwval1: ! R4
.word 0x0000
.word 0x0001
.word 0x7fff
.word 0xffff
.word 0x7fff
.word 0x0001
.word 0x8000
.word 0xffff
.word 0x8000
.word 0x7fff
.word 0x8000
.word 0x7fff
.word 0x8000
.word 0x7fff
.word 0x8000
.word 0x7fff
.word 0x8000
.word 0x0001
.word 0x0001
.word 0x0001
.word 0x0001
.word 0x0001
.word 0x0001
_macwval2: ! R5
.word 0x0000
.word 0x7fff
.word 0x0001
.word 0x7fff
.word 0xffff
.word 0x8000
.word 0x0001
.word 0x8000
.word 0xffff
.word 0x7fff
.word 0x8000
.word 0x7fff
.word 0x8000
.word 0x8000
.word 0x7fff
.word 0x8000
.word 0x7fff
.word 0x0001
.word 0xffff
.word 0x0001
.word 0xffff
.word 0x0001
.word 0xffff
_macwmach: ! R6
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0xffffffff
.long 0xffffffff
.long 0xffffffff
.long 0xffffffff
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0xffffffff
.long 0xffffffff
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0xffffffff
.long 0x00000001
.long 0xffffffff
.long 0x00000007
.long 0x0000000b
_macwmacl: ! R7
.long 0x00000000
.long 0x00007fff
.long 0x00007fff
.long 0xffff8001
.long 0xffff8001
.long 0xffff8000
.long 0xffff8000
.long 0x00008000
.long 0x00008000
.long 0x3fff0001
.long 0x40000000
.long 0x3fff0001
.long 0x40000000
.long 0xc0008000
.long 0xc0008000
.long 0xc0008000
.long 0xc0008000
.long 0x80000000
.long 0x7fffffff
.long 0x7fffffff
.long 0x80000000
.long 0x7fffffff
.long 0x80000000
!-----------------------------
.align 4
_pmacwsbit: .long _macwsbit
_pmacwinih: .long _macwinih
_pmacwinil: .long _macwinil
_pmacwval1: .long _macwval1
_pmacwval2: .long _macwval2
_pmacwmach: .long _macwmach
_pmacwmacl: .long _macwmacl
_pmacwcount: .long (_macwinih - _macwsbit)/4
_macw_value_end:
/**************
Congratulations
**************/
_pass:
lds.l @r15+, pr
mov.l _ppass_value, r0
mov.l _ppass_addr, r1
mov.l r0, @r1
rts
nop
.align 4
_ppass_addr: .long 0xABCD0000
_ppass_value: .long 0x00000061
/**********
You Failed
**********/
_fail:
mov.l _pfail_value, r0
mov.l _pfail_value, r1
bra _fail
nop
.align 4
_pfail_value: .long 0x88888888
.end

732
testrom/tests/testmov.s Normal file
View File

@@ -0,0 +1,732 @@
/**************
Initialization
**************/
.global _testmov
_testmov:
sts.l pr, @-r15
mov.l _pfail, r13 !fail address
bra _testgo
nop
_pfail: .long _fail
_testgo:
/******************
LDC Rm, SR/GBR/VBR
STC SR/GBR/VBR, Rn
******************/
_ldcstc:
mov #0xff, r0
mov.l _p01234567, r1
mov.l _p89abcdef, r2
ldc r0, sr
mov.l _p000003f3, r0
stc sr, r3
ldc r1, gbr
stc gbr, r4
ldc r2, vbr
stc vbr, r5
!-----
cmp/eq r3, r0
bt .+6
jmp @r13
nop
!-----
cmp/eq r4, r1
bt .+6
jmp @r13
nop
!-----
cmp/eq r5, r2
bt .+6
jmp @r13
nop
/********************
CLRMAC
LDS Rm, MACH/MACL/PR
STS MACH/MACL/PR, Rn
********************/
_ldssts:
clrmac
mov.l _p01234567, r0
lds r0, mach
mov.l _p89abcdef, r1
lds r1, macl
mov.l _p55aa55aa, r2
lds r2, pr
sts mach, r3
sts macl, r4
sts pr, r5
!-----
cmp/eq r3, r0
bt .+6
jmp @r13
nop
!----
cmp/eq r4, r1
bt .+6
jmp @r13
nop
!----
cmp/eq r5, r2
bt .+6
jmp @r13
nop
/****************
LDS.L @Rm+, MACH
STS.L MACH, @-Rn
****************/
_ldslstsl:
clrmac
mov.l _pram0, r1
mov.l _pram0_16, r2
mov.l _p01234567, r0
mov.l r0, @r1
!----
lds.l @r1+, mach
sts.l mach, @-r2
!----
sts mach, r3
cmp/eq r3, r0
bt .+6
jmp @r13
nop
!----
mov.l @r2, r3
cmp/eq r3, r0
bt .+6
jmp @r13
nop
!----
mov.l _pram0_4, r4
cmp/eq r4, r1
bt .+6
jmp @r13
nop
!----
mov.l _pram0_12, r5 !_pram0+16-4
cmp/eq r5, r2
bt .+6
jmp @r13
nop
/****************
LDS.L @Rm+, MACL
STS.L MACL, @-Rn
****************/
clrmac
mov.l _pram0, r1
mov.l _pram0_16, r2
mov.l _p89abcdef, r0
mov.l r0, @r1
!----
lds.l @r1+, macl
sts.l macl, @-r2
!----
sts macl, r3
cmp/eq r3, r0
bt .+6
jmp @r13
nop
!----
mov.l @r2, r3
cmp/eq r3, r0
bt .+6
jmp @r13
nop
!----
mov.l _pram0_4, r4
cmp/eq r4, r1
bt .+6
jmp @r13
nop
!----
mov.l _pram0_12, r5 !_pram0+16-4
cmp/eq r5, r2
bt .+6
jmp @r13
nop
/**************
LDS.L @Rm+, PR
STS.L PR, @-Rn
**************/
mov.l _pram0, r1
mov.l _pram0_16, r2
mov.l _p11223344, r0
mov.l r0, @r1
!----
lds.l @r1+, pr
sts.l pr, @-r2
!----
sts pr, r3
cmp/eq r3, r0
bt .+6
jmp @r13
nop
!----
mov.l @r2, r3
cmp/eq r3, r0
bt .+6
jmp @r13
nop
!----
mov.l _pram0_4, r4
cmp/eq r4, r1
bt .+6
jmp @r13
nop
!----
mov.l _pram0_12, r5 !_pram0+16-4
cmp/eq r5, r2
bt .+6
jmp @r13
nop
/**************
LDC.L @Rm+, SR
STC.L SR, @-Rn
**************/
_ldclstcl:
mov #0, r0
ldc r0, sr
mov.l _pram0, r1
mov.l _pram0_16, r2
mov #0xff, r0
mov.l r0, @r1
mov.l _p000003f3, r0
!----
ldc.l @r1+, sr
stc.l sr, @-r2
!----
stc sr, r3
cmp/eq r3, r0
bt .+6
jmp @r13
nop
!----
mov.l @r2, r3
cmp/eq r3, r0
bt .+6
jmp @r13
nop
!----
mov.l _pram0_4, r4
cmp/eq r4, r1
bt .+6
jmp @r13
nop
!----
mov.l _pram0_12, r5 !_pram0+16-4
cmp/eq r5, r2
bt .+6
jmp @r13
nop
/***************
LDC.L @Rm+,GBR
STC.L GBR, @-Rn
***************/
mov #0, r0
ldc r0, gbr
mov.l _pram0, r1
mov.l _pram0_16, r2
mov.l _p11223344, r0
mov.l r0, @r1
!----
ldc.l @r1+, gbr
stc.l gbr, @-r2
!----
stc gbr, r3
cmp/eq r3, r0
bt .+6
jmp @r13
nop
!----
mov.l @r2, r3
cmp/eq r3, r0
bt .+6
jmp @r13
nop
!----
mov.l _pram0_4, r4
cmp/eq r4, r1
bt .+6
jmp @r13
nop
!----
mov.l _pram0_12, r5 !_pram0+16-4
cmp/eq r5, r2
bt .+6
jmp @r13
nop
/***************
LDC.L @Rm+,VBR
STC.L VBR, @-Rn
***************/
mov #0, r0
ldc r0, vbr
mov.l _pram0, r1
mov.l _pram0_16, r2
mov.l _p89abcdef, r0
mov.l r0, @r1
!----
ldc.l @r1+, vbr
stc.l vbr, @-r2
!----
stc vbr, r3
cmp/eq r3, r0
bt .+6
jmp @r13
nop
!----
mov.l @r2, r3
cmp/eq r3, r0
bt .+6
jmp @r13
nop
!----
mov.l _pram0_4, r4
cmp/eq r4, r1
bt .+6
jmp @r13
nop
!----
mov.l _pram0_12, r5 !_pram0+16-4
cmp/eq r5, r2
bt .+6
jmp @r13
nop
/**************
MOV.L Rm, @-Rn
**************/
_movlramr:
mov.l _pram0, r1
mov.l _paabbccdd, r0
!----
mov r1, r2
add #4, r2
mov.l r0, @-r2
!----
cmp/eq r1, r2
bt .+6
jmp @r13
nop
!----
mov.l @r1, r3
cmp/eq r3, r0
bt .+6
jmp @r13
nop
/**************
MOV.W Rm, @-Rn
**************/
_movwramr:
mov.l _pram0, r1
mov.w _paabb, r0
!----
mov r1, r2
add #2, r2
mov.w r0, @-r2
!----
cmp/eq r1, r2
bt .+6
jmp @r13
nop
!----
mov.w @r1, r3
cmp/eq r3, r0
bt .+6
jmp @r13
nop
/**************
MOV.B Rm, @-Rn
**************/
_movbramr:
mov.l _pram0, r1
mov #0xaa, r0
!----
mov r1, r2
add #1, r2
mov.b r0, @-r2
!----
cmp/eq r1, r2
bt .+6
jmp @r13
nop
!----
mov.b @r1, r3
cmp/eq r3, r0
bt .+6
jmp @r13
nop
/**************
MOV.L @Rm+, Rn
**************/
_movlarpr:
mov.l _pram0, r1
mov.l _paabbccdd, r0
mov.l r0, @r1
!----
mov r1, r2
mov.l @r2+, r3
!----
add #4, r1
cmp/eq r1, r2
bt .+6
jmp @r13
nop
!----
cmp/eq r3, r0
bt .+6
jmp @r13
nop
/**************
MOV.W @Rm+, Rn
**************/
_movwarpr:
mov.l _pram0, r1
mov.w _paabb, r0
mov.w r0, @r1
!----
mov r1, r2
mov.w @r2+, r3
!----
add #2, r1
cmp/eq r1, r2
bt .+6
jmp @r13
nop
!----
cmp/eq r3, r0
bt .+6
jmp @r13
nop
/**************
MOV.B @Rm+, Rn
**************/
_movbarpr:
mov.l _pram0, r1
mov #0xaa, r0
mov.b r0, @r1
!----
mov r1, r2
mov.b @r2+, r3
!----
add #1, r1
cmp/eq r1, r2
bt .+6
jmp @r13
nop
!----
cmp/eq r3, r0
bt .+6
jmp @r13
nop
/**************
MOV.L @Rm+, Rm
**************/
_movlarpr2:
mov.l _pram0, r1
mov.l _paabbccdd, r0
mov.l r0, @r1
!----
mov.l @r1+, r1
!----
cmp/eq r1, r0
bt .+6
jmp @r13
nop
/**************
MOV.W @Rm+, Rm
**************/
_movwarpr2:
mov.l _pram0, r1
mov.w _paabb, r0
mov.w r0, @r1
!----
mov.w @r1+, r1
!----
cmp/eq r1, r0
bt .+6
jmp @r13
nop
/**************
MOV.B @Rm+, Rm
**************/
_movbarpr2:
mov.l _pram0, r1
mov #0xaa, r0
mov.b r0, @r1
!----
mov.b @r1+, r1
!----
cmp/eq r1, r0
bt .+6
jmp @r13
nop
/*****************
MOV.L/W/B @Rm, Rn
MOV.L/W/B Rm, @Rn
*****************/
_movlwb:
mov.l _pram0, r2
mov.l _p11223344, r1
mov.l r1, @r2
!----
mov.l _p11223344, r8
mov.l _p00001122, r9
mov.l _p00000011, r10
!----
mov.l @r2, r0
cmp/eq r0, r8
bt .+6
jmp @r13
nop
!----
mov.w @r2, r0
cmp/eq r0, r9
bt .+6
jmp @r13
nop
!----
mov.b @r2, r0
cmp/eq r0, r10
bt .+6
jmp @r13
nop
!----
mov.l _pram0, r0
mov #0xaa, r1
mov.b r1, @r0
add #1, r0
mov #0xbb, r1
mov.b r1, @r0
add #1, r0
mov.l _pccdd, r1
mov.w r1, @r0
!----
mov.l _paabbccdd, r8
mov.l _pffffaabb, r9
mov.l _pffffffaa, r10
!----
mov.l _pram0, r0
mov.l @r0, r2
cmp/eq r2, r8
bt .+6
jmp @r13
nop
!----
mov.w @r0, r3
cmp/eq r3, r9
bt .+6
jmp @r13
nop
!----
mov.b @r0, r4
cmp/eq r4, r10
bt .+6
jmp @r13
nop
/**************
Constant Table
**************/
bra _constantend
nop
.align 4
_pram0 : .long _ram0+128
_pram0_4 : .long _ram0+128+4
_pram0_12 : .long _ram0+128+16-4
_pram0_16 : .long _ram0+128+16
_p01234567: .long 0x01234567
_p89abcdef: .long 0x89abcdef
_p55aa55aa: .long 0x55aa55aa
_p11223344: .long 0x11223344
_p00001122: .long 0x00001122
_p00000011: .long 0x00000011
_paabbccdd: .long 0xaabbccdd
_pffffaabb: .long 0xffffaabb
_pffffffaa: .long 0xffffffaa
_pccdd : .long 0xffffccdd
_p000003f3: .long 0x000003f3
_p00010203: .long 0x00010203
_p04050607: .long 0x04050607
_paabb : .word 0xaabb
.align 2
_constantend:
/*****************
CAS Rm, Rn, @R0
*****************/
_cas_r:
mov.l _pram0_cas, r0
mov.l _p11223344_cas, r1
mov.l _p00001122_cas, r2
mov.l _p55aa55aa_cas, r3
mov.l r1, @r0
mov.l _pram0_4_cas, r4
mov.l _paabbccdd_cas, r5
mov.l r5, @r4
!----
mov #0, r10
mov #1, r11
mov #2, r12
mov r1, r8
mov r2, r9
/* cas.l r8, r9, @r0 */
.word 0x02983
! cas.l had a bug where a subsequent instruction was skipped when the write back happened
! Do some movs to check later
mov #10, r10
mov #11, r11
mov #12, r12
!---- check CAS succeeded
bt .+6
jmp @r13
nop
!---- check r8 unchanged
cmp/eq r8, r1
bt .+6
jmp @r13
nop
!---- check r9 was set to old @R0
cmp/eq r9, r1
bt .+6
jmp @r13
nop
!---- check that @R0 was written
mov.l @r0, r4
cmp/eq r4, r2
bt .+6
jmp @r13
nop
!---- check mov instructions after cas set r10, r11, and r12
mov #10, r7
cmp/eq r7, r10
bt .+6
jmp @r13
nop
mov #11, r7
cmp/eq r7, r11
bt .+6
jmp @r13
nop
mov #12, r7
cmp/eq r7, r12
bt .+6
jmp @r13
nop
!----
mov #0, r10
mov #1, r11
mov #2, r12
mov.l r1, @r0
mov r3, r8
mov r2, r9
/* cas.l r8, r9, @r0 */
.word 0x02983
! cas.l had a bug where a subsequent instruction was skipped when the write back happened
! Do some movs to check later
mov #10, r10
mov #11, r11
mov #12, r12
!---- check CAS failed
bf .+6
jmp @r13
nop
!---- check r8 unchanged
cmp/eq r8, r3
bt .+6
jmp @r13
nop
!---- check r9 was set to old @R0
cmp/eq r9, r1
bt .+6
jmp @r13
nop
!---- check that @R0 unchanged
mov.l @r0, r4
cmp/eq r4, r1
bt .+6
jmp @r13
nop
!---- check mov instructions after cas set r10, r11, and r12
mov #10, r7
cmp/eq r7, r10
bt .+6
jmp @r13
nop
mov #11, r7
cmp/eq r7, r11
bt .+6
jmp @r13
nop
mov #12, r7
cmp/eq r7, r12
bt .+6
jmp @r13
nop
!----
/**************
Constant Table - Second table because cas tests were pushing previous
constant table past pcrel limit
**************/
bra _constantend_cas
nop
.align 4
_pram0_cas : .long _ram0+128
_pram0_4_cas : .long _ram0+128+4
_p55aa55aa_cas: .long 0x55aa55aa
_p11223344_cas: .long 0x11223344
_p00001122_cas: .long 0x00001122
_paabbccdd_cas: .long 0xaabbccdd
.align 2
_constantend_cas:
/**************
Congratulations
**************/
_pass:
lds.l @r15+, pr
mov.l _ppass_value, r0
mov.l _ppass_addr, r1
mov.l r0, @r1
rts
nop
.align 4
_ppass_addr: .long 0xABCD0000
_ppass_value: .long 0x00000021
/**********
You Failed
**********/
_fail:
mov.l _pfail_value, r0
mov.l _pfail_value, r1
bra _fail
nop
.align 4
_pfail_value: .long 0x88888888
.end

429
testrom/tests/testmov2.s Normal file
View File

@@ -0,0 +1,429 @@
/**************
Initialization
**************/
.global _testmov2
_testmov2:
sts.l pr, @-r15
mov.l _pfail, r13 !fail address
bra _testgo
nop
_pfail: .long _fail
_testgo:
/********************
MOVA @(disp, PC), R0
********************/
mov #0xaa, r1
mova _mova_target, r0
jmp @r0
nop
jmp @r13
nop
jmp @r13
nop
jmp @r13
nop
_mova_target:
bra _mova_target2
mova _mova_target3, r0
jmp @r13
nop
_mova_target2:
jmp @r0 ! jmp _mova_target4
nop
_mova_target3:
mov #0x55, r1 ! should be skipped
jmp @r13 ! should be skipped
_mova_target4:
nop
mov r1, r0
cmp/eq #0xaa, r0
bt .+6
jmp @r13
nop
/**********************
MOV.L R0, @(disp, GBR)
MOV.W R0, @(disp, GBR)
MOV.B R0, @(disp, GBR)
MOV.L @(disp, GBR), R0
MOV.W @(disp, GBR), R0
MOV.B @(disp, GBR), R0
**********************/
mov.l _pram0, r1
ldc r1, gbr
mov.l _p11223344, r0
mov.l r0, @(4, gbr)
mov.w r0, @(10, gbr)
mov.b r0, @(13, gbr)
mov #0xff, r0
cmp/eq #0xff, r0
bt .+6
jmp @r13
nop
mov.l @(4, r1), r0
mov.l _p11223344, r2
cmp/eq r2, r0
bt .+6
jmp @r13
nop
mov.w @(10, r1), r0
mov.l _p00003344, r2
cmp/eq r2, r0
bt .+6
jmp @r13
nop
mov.b @(13, r1), r0
mov.l _p00000044, r2
cmp/eq r2, r0
bt .+6
jmp @r13
nop
mov.l @(4, gbr), r0
mov.l _p11223344, r2
cmp/eq r2, r0
bt .+6
jmp @r13
nop
mov.w @(10, gbr), r0
mov.l _p00003344, r2
cmp/eq r2, r0
bt .+6
jmp @r13
nop
mov.b @(13, gbr), r0
mov.l _p00000044, r2
cmp/eq r2, r0
bt .+6
jmp @r13
nop
/*********************
MOV.L Rm, @(disp, Rn)
MOV.W R0, @(disp, Rn)
MOV.B R0, @(disp, Rn)
*********************/
mov.l _pram0, r1
mov.l _p11223344, r2
mov.l _pram0_16, r3
mov.l r2, @(16, r1)
mov.l @r3, r0
cmp/eq r2, r0
bt .+6
jmp @r13
nop
mov #0xff, r0
mov.l r0, @(8, r1)
mov.l _p11223344, r0
mov.w r0, @(8, r1)
mov r1, r5
add #8, r5
mov.b @(0, r5), r0
cmp/eq #0x33, r0
bt .+6
jmp @r13
nop
mov.b @(1, r5), r0
cmp/eq #0x44, r0
bt .+6
jmp @r13
nop
mov.w @(2, r5), r0
cmp/eq #0xff, r0
bt .+6
jmp @r13
nop
mov #0xff, r0
mov.l r0, @(4, r1)
mov.l _p11223344, r0
mov.b r0, @(4, r1)
mov r1, r5
add #4, r5
mov.b @(0, r5), r0
cmp/eq #0x44, r0
bt .+6
jmp @r13
nop
mov.b @(1, r5), r0
cmp/eq #0xff, r0
bt .+6
jmp @r13
nop
mov.w @(2, r5), r0
cmp/eq #0xff, r0
bt .+6
jmp @r13
nop
/*********************
MOV.L @(disp, Rm), Rn
MOV.W @(disp, Rm), R0
MOV.B @(disp, Rm), R0
*********************/
mov.l _pram0_16, r1
mov.l _p11223344, r2
mov.l r2, @r1
mov.l _pram0, r3
mov.l @(16, r3), r4
cmp/eq r4, r2
bt .+6
jmp @r13
nop
mov.w @(16, r3), r0
mov.l _p00001122, r4
cmp/eq r4, r0
bt .+6
jmp @r13
nop
add #4, r3
mov.b @(16-4, r3), r0
mov.l _p00000011, r4
cmp/eq r4, r0
bt .+6
jmp @r13
nop
/*******************
MOV.B @(R0, Rm), Rn
*******************/
mov.l _pram0, r1
mov.l _p04050607, r0
mov.l _p11223344, r2
mov.l r0, @(0, r1)
mov.l r2, @(4, r1)
mov.b @(0, r1), r0
mov.l _pram0, r3
mov.b @(r0, r3), r4
mov.l _p00000011, r0
cmp/eq r4, r0
bt .+6
jmp @r13
nop
/*******************
MOV.W @(R0, Rm), Rn
*******************/
mov.l _pram0, r1
mov.l _p04050607, r0
mov.l _p11223344, r2
mov.l r0, @(0, r1)
mov.l r2, @(4, r1)
mov.b @(0, r1), r0
mov.l _pram0, r3
mov.w @(r0, r3), r4
mov.l _p00001122, r0
cmp/eq r4, r0
bt .+6
jmp @r13
nop
/*******************
MOV.L @(R0, Rm), Rn
*******************/
mov.l _pram0, r1
mov.l _p04050607, r0
mov.l _p11223344, r2
mov.l r0, @(0, r1)
mov.l r2, @(4, r1)
mov.b @(0, r1), r0
mov.l _pram0, r3
mov.l @(r0, r3), r4
mov.l _p11223344, r0
cmp/eq r4, r0
bt .+6
jmp @r13
nop
mov.l _pram0, r3
mov.b @(0, r1), r0
mov.l @(r0, r3), r4
mov.l _p11223344, r0
cmp/eq r4, r0
bt .+6
jmp @r13
nop
/*******************
MOV.B Rm, @(R0, Rn)
*******************/
mov.l _pram0, r1
mov.l _pram0_16, r3
mov.l _p00010203, r0
mov.l _p04050607, r2
mov.l r0, @(0, r1)
mov.l r2, @(4, r1)
mov #0xff, r0
mov.l r0, @(4, r3)
mov.l _p01234567, r2
mov.b @(4, r1), r0 ! r0=4
mov.b r2, @(r0, r3)
mov r3, r5
add #4, r5
mov.b @(0, r5), r0
cmp/eq #0x67, r0
bt .+6
jmp @r13
nop
mov.b @(1, r5), r0
cmp/eq #0xff, r0
bt .+6
jmp @r13
nop
mov.w @(2, r5), r0
cmp/eq #0xff, r0
bt .+6
jmp @r13
nop
/*******************
MOV.W Rm, @(R0, Rn)
*******************/
mov.l _pram0, r1
mov.l _pram0_16, r3
mov.l _p00010203, r0
mov.l _p04050607, r2
mov.l r0, @(0, r1)
mov.l r2, @(4, r1)
mov #0xff, r0
mov.l r0, @(4, r3)
mov.l _p01234567, r2
mov.b @(4, r1), r0 ! r0=4
mov.w r2, @(r0, r3)
mov r3, r5
add #4, r5
mov.b @(0, r5), r0
cmp/eq #0x45, r0
bt .+6
jmp @r13
nop
mov.b @(1, r5), r0
cmp/eq #0x67, r0
bt .+6
jmp @r13
nop
mov.w @(2, r5), r0
cmp/eq #0xff, r0
bt .+6
jmp @r13
nop
/***********************
MOV.L Rm, @(R0, Rn)
***********************/
mov.l _pram0, r1
mov.l _pram0_16, r3
mov.l _p00010203, r0
mov.l _p04050607, r2
mov.l r0, @(0, r1)
mov.l r2, @(4, r1)
mov #0xff, r0
mov.l r0, @(4, r3)
mov.l _p01234567, r2
mov.b @(4, r1), r0 ! r0=4
mov.l r2, @(r0, r3)
mov r3, r5
add #4, r5
mov.l @r5, r4
cmp/eq r2, r4
bt .+6
jmp @r13
nop
mov.b @(4, r1), r0 ! r0=4
mov.l _p01234567, r2
mov.l r2, @(r0, r3)
mov r3, r5
add #4, r5
mov.l @r5, r4
cmp/eq r2, r4
bt .+6
jmp @r13
nop
mov.l _p01234567, r2
mov.b @(4, r1), r0 ! r0=4
mov.l _pram0_16, r3
mov.l r2, @(r0, r3)
mov r3, r5
add #4, r5
mov.l @r5, r4
cmp/eq r2, r4
bt .+6
jmp @r13
nop
/**************
Constant Table
**************/
bra _constantend
nop
.align 4
_pram0 : .long _ram0+128
_pram0_4 : .long _ram0+128+4
_pram0_12 : .long _ram0+128+16-4
_pram0_16 : .long _ram0+128+16
_p01234567: .long 0x01234567
_p89abcdef: .long 0x89abcdef
_p55aa55aa: .long 0x55aa55aa
_p11223344: .long 0x11223344
_p00001122: .long 0x00001122
_p00000011: .long 0x00000011
_p00003344: .long 0x00003344
_p00000044: .long 0x00000044
_paabbccdd: .long 0xaabbccdd
_pffffaabb: .long 0xffffaabb
_pffffffaa: .long 0xffffffaa
_pccdd : .long 0xffffccdd
_p000003f3: .long 0x000003f3
_p00010203: .long 0x00010203
_p04050607: .long 0x04050607
_paabb : .word 0xaabb
.align 2
_constantend:
/**************
Congratulations
**************/
_pass:
lds.l @r15+, pr
mov.l _ppass_value, r0
mov.l _ppass_addr, r1
mov.l r0, @r1
rts
nop
.align 4
_ppass_addr: .long 0xABCD0000
_ppass_value: .long 0x00000022
/**********
You Failed
**********/
_fail:
mov.l _pfail_value, r0
mov.l _pfail_value, r1
bra _fail
nop
.align 4
_pfail_value: .long 0x88888888
.end

119
testrom/tests/testmov3.s Normal file
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/**************
Initialization
**************/
.global _testmov3
_testmov3:
sts.l pr, @-r15
mov.l _pfail, r13 !fail address
bra _testgo
nop
_pfail: .long _fail
_testgo:
/********************
LDS Rm, CPi_COM
STS CPi_COM, Rn
CLDS CPi_Rm, CPi_COM
CSTS CPi_COM, CPi_Rn
********************/
mov.l _pram0, r1
ldc r1, gbr
! save pit_throttle
/* clds cpi_r2, cpi_com (4m89) */
.word 0x4289
/* sts cpi_com, r0 (4nc8) */
.word 0x40c8
mov.l r0, @(4, gbr)
! body
mov.l _p0006ffff, r2
/* lds r2, cpi_com (4m88) */
.word 0x4288
/* csts cpi_com, cpi_r2 (4nc9) */
.word 0x42c9
mov #0, r0
/* lds r0, cpi_com (4m88) */
.word 0x4088
/* clds cpi_r2, cpi_com (4m89) */
.word 0x4289
/* sts cpi_com, r1 (4nc8) */
.word 0x41c8
cmp/eq r1,r2
bt .+6
jmp @r13
nop
/********************
LDS Rm, CP0_COM
STS CP0_COM, Rn
CLDS CP0_Rm, CP0_COM
CSTS CP0_COM, CP0_Rn
********************/
mov.l _p00070000, r2
/* lds r2, cp0_com (4m5a) */
.word 0x425a
/* csts cp0_com, cp0_r2 (fn0d) */
.word 0xf20d
mov #0, r0
/* lds r0, cp0_com (4m5a) */
.word 0x405a
/* clds cp0_r2, cp0_com (fm1d) */
.word 0xf21d
/* sts cp0_com, r1 (0n5a) */
.word 0x015a
cmp/eq r1,r2
#ifdef AAAAA
bt .+6
#else
bt .+6
#endif
jmp @r13
nop
! restore pit_throttle
mov.l @(4, gbr), r0
mov r0, r3
/* lds r3, cp0_com (4m5a) */
.word 0x435a
/* csts cp0_com, cp0_r2 (fn0d) */
.word 0xf20d
/**************
Constant Table
**************/
bra _constantend
nop
.align 4
_pram0 : .long _ram0+128
_p0006ffff: .long 0x0006ffff
_p00070000: .long 0x00070000
.align 2
_constantend:
/**************
Congratulations
**************/
_pass:
lds.l @r15+, pr
mov.l _ppass_value, r0
mov.l _ppass_addr, r1
mov.l r0, @r1
rts
nop
.align 4
_ppass_addr: .long 0xABCD0000
_ppass_value: .long 0x00000023
/**********
You Failed
**********/
_fail:
mov.l _pfail_value, r0
mov.l _pfail_value, r1
bra _fail
nop
.align 4
_pfail_value: .long 0x88888888
.end

430
testrom/tests/testmul.s Normal file
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/**************
Initialization
**************/
.global _testmul
_testmul:
sts.l pr, @-r15
mov.l _pfail, r13 !fail address
bra _testgo
nop
_pfail: .long _fail
_testgo:
/************************
MAC.L @Rm+, @Rn+ : basic
************************/
_macl:
mov #0, r0
ldc r0, sr !S=0
mov #0x02, r0
clrmac
mov.l _pmacldata1, r1
mov.l _pmacldata2, r2
mac.l @r2+, @r1+
ldc r0, sr !S=1, no effect to MAC operation
sts mach, r3
sts macl, r4
mov.l _pmacldata3, r5
mov.l @r5+, r6
mov.l @r5+, r7
!----
cmp/eq r6, r3
bt .+6
jmp @r13
nop
!----
cmp/eq r7, r4
bt .+6
jmp @r13
nop
!----
mov #0, r0
ldc r0, sr !S=0
mac.l @r2+, @r1+
clrmac !only check clear timing
!----
mac.l @r2+, @r1+
mac.l @r2+, @r1+
mac.l @r2+, @r1+
mac.l @r2+, @r1+
sts macl, r4
sts mach, r3
mov.l @r5+, r6
mov.l @r5+, r7
!----
cmp/eq r6, r3
bt .+6
jmp @r13
nop
!----
cmp/eq r7, r4
bt .+6
jmp @r13
nop
!----
bra _maclend
nop
.align 4
_macldata1:
.long 0x01234567 !19088743
.long 0xfffffffd !dummy (-3)
.long 0x00000002
.long 0x00000003
.long 0x00000004
.long 0x00000005
_macldata2:
.long 0x89abcdef !-1985229329
.long 0x00000002 !dummy (2)
.long 0x00000006
.long 0x00000007
.long 0x00000008
.long 0x00000009
_macldata3:
.long 0xff795e36 !-37895532457343447
.long 0xc94e4629
.long 0x00000000 !(2x6)+(3x7)+(4x8)+(5x9)=12+21+28+45=110
.long 0x0000006e
.align 4
_pmacldata1: .long _macldata1
_pmacldata2: .long _macldata2
_pmacldata3: .long _macldata3
_maclend:
/***********************************
MAC.L @Rm+, @Rn+ : value dependency
***********************************/
_macl_value:
mov.l _pmaclsbit, r1
mov.l _pmaclinih, r2
mov.l _pmaclinil, r3
mov.l _pmaclval1, r4
mov.l _pmaclval2, r5
mov.l _pmaclmach, r6
mov.l _pmaclmacl, r7
mov.l _pmaclcount, r8
_mac_value1:
mov.l @r1+, r0
ldc r0, sr
mov.l @r2+, r0
lds r0, mach
mov.l @r3+, r0
lds r0, macl
mac.l @r5+, @r4+
sts mach, r9
sts macl, r10
!----
mov.l @r6+, r0
cmp/eq r0, r9
bt .+6
jmp @r13
nop
!----
mov.l @r7+, r0
cmp/eq r0, r10
bt .+6
jmp @r13
nop
!----
add #-1, r8
cmp/pl r8
bt _mac_value1
!----
bra _macl_value_end:
nop
.align 4
!-----------------------------
! S=0 00000000 x 00000000
! S=0 00000001 x 7fffffff
! S=0 7fffffff x 00000001
! S=0 ffffffff x 7fffffff
! S=0 7fffffff x ffffffff
! S=0 00000001 x 80000000
! S=0 80000000 x 00000001
! S=0 ffffffff x 80000000
! S=0 80000000 x ffffffff
! S=0 7fffffff x 7fffffff
! S=0 80000000 x 80000000
! S=1 7fffffff x 7fffffff
! S=1 80000000 x 80000000
! S=0 7fffffff x 80000000
! S=0 80000000 x 7fffffff
! S=1 7fffffff x 80000000
! S=1 80000000 x 7fffffff
! S=0 00000001 x 00000001 + 00007fff:ffffffff
! S=0 00000001 x ffffffff + ffff8000:00000000
! S=1 00000001 x 00000001 + 00007fff:ffffffff
! S=1 00000001 x ffffffff + ffff8000:00000000
! S=1 00000001 x 00000001 + 0007ffff:ffffffff
! S=1 00000001 x ffffffff + fff80000:00000000
_maclsbit: ! R1
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000002 ! S=1
.long 0x00000002 ! S=1
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000002 ! S=1
.long 0x00000002 ! S=1
.long 0x00000000 ! S=0
.long 0x00000000 ! S=0
.long 0x00000002 ! S=1
.long 0x00000002 ! S=1
.long 0x00000002 ! S=1
.long 0x00000002 ! S=1
_maclinih: ! R2
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00007fff
.long 0xffff8000
.long 0x00007fff
.long 0xffff8000
.long 0x0007ffff
.long 0xfff80000
_maclinil: ! R3
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0xffffffff
.long 0x00000000
.long 0xffffffff
.long 0x00000000
.long 0xffffffff
.long 0x00000000
_maclval1: ! R4
.long 0x00000000
.long 0x00000001
.long 0x7fffffff
.long 0xffffffff
.long 0x7fffffff
.long 0x00000001
.long 0x80000000
.long 0xffffffff
.long 0x80000000
.long 0x7fffffff
.long 0x80000000
.long 0x7fffffff
.long 0x80000000
.long 0x7fffffff
.long 0x80000000
.long 0x7fffffff
.long 0x80000000
.long 0x00000001
.long 0x00000001
.long 0x00000001
.long 0x00000001
.long 0x00000001
.long 0x00000001
_maclval2: ! R5
.long 0x00000000
.long 0x7fffffff
.long 0x00000001
.long 0x7fffffff
.long 0xffffffff
.long 0x80000000
.long 0x00000001
.long 0x80000000
.long 0xffffffff
.long 0x7fffffff
.long 0x80000000
.long 0x7fffffff
.long 0x80000000
.long 0x80000000
.long 0x7fffffff
.long 0x80000000
.long 0x7fffffff
.long 0x00000001
.long 0xffffffff
.long 0x00000001
.long 0xffffffff
.long 0x00000001
.long 0xffffffff
_maclmach: ! R6
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0xffffffff
.long 0xffffffff
.long 0xffffffff
.long 0xffffffff
.long 0x00000000
.long 0x00000000
.long 0x3fffffff
.long 0x40000000
.long 0x00007fff
.long 0x00007fff
.long 0xc0000000
.long 0xc0000000
.long 0xffff8000
.long 0xffff8000
.long 0x00008000
.long 0xffff7fff
.long 0x00007fff
.long 0xffff8000
.long 0x00007fff
.long 0xffff8000
_maclmacl: ! R7
.long 0x00000000
.long 0x7fffffff
.long 0x7fffffff
.long 0x80000001
.long 0x80000001
.long 0x80000000
.long 0x80000000
.long 0x80000000
.long 0x80000000
.long 0x00000001
.long 0x00000000
.long 0xffffffff
.long 0xffffffff
.long 0x80000000
.long 0x80000000
.long 0x00000000
.long 0x00000000
.long 0x00000000
.long 0xffffffff
.long 0xffffffff
.long 0x00000000
.long 0xffffffff
.long 0x00000000
!-----------------------------
.align 4
_pmaclsbit: .long _maclsbit
_pmaclinih: .long _maclinih
_pmaclinil: .long _maclinil
_pmaclval1: .long _maclval1
_pmaclval2: .long _maclval2
_pmaclmach: .long _maclmach
_pmaclmacl: .long _maclmacl
_pmaclcount: .long (_maclinih - _maclsbit)/4
_macl_value_end:
/**************
Congratulations
**************/
_pass:
lds.l @r15+, pr
mov.l _ppass_value, r0
mov.l _ppass_addr, r1
mov.l r0, @r1
rts
nop
.align 4
_ppass_addr: .long 0xABCD0000
_ppass_value: .long 0x00000041
/**********
You Failed
**********/
_fail:
mov.l _pfail_value, r0
mov.l _pfail_value, r1
bra _fail
nop
.align 4
_pfail_value: .long 0x88888888
.end

1067
testrom/tests/testmulconf.s Normal file

File diff suppressed because it is too large Load Diff

132
testrom/tests/testmull.s Normal file
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@@ -0,0 +1,132 @@
/**************
Initialization
**************/
.global _testmull
_testmull:
sts.l pr, @-r15
mov.l _pfail, r13 !fail address
bra _testgo
nop
_pfail: .long _fail
_testgo:
/************************
MUL.L Rm, Rn
************************/
mov.l _ptestvalue1, r1
mov.l _ptestvalue2, r2
mov #0xff, r0
lds r0, mach
mul.l r2, r1
mul.l r1, r2
mul.l r2, r1
mul.l r1, r2 !You should check mult contention,here.
_testloop:
mov.l @r1+, r3
mov.l @r1+, r4
mov.l @r1+, r5
mov.l @r1+, r6
mul.l r4, r3
sts mach, r3 !You should check mult contention,here.
sts macl, r4
!----
cmp/eq r5, r3
bt .+6
jmp @r13
nop
!----
cmp/eq r6, r4
bt .+6
jmp @r13
nop
!----
cmp/eq r2, r1
bf _testloop
bra _testfinish
nop
!----
.align 4
_ptestvalue1: .long _testvalue1
_ptestvalue2: .long _testvalue2
.align 4
_testvalue1:
.long 0x00000002 !Rn
.long 0x00000003 !Rm
.long 0xffffffff !MACH
.long 0x00000006 !MACL
.long 0x12345678
.long 0x9abcdef0
.long 0xffffffff
.long 0x242d2080
.long 0x00000001
.long 0xffffffff
.long 0xffffffff
.long 0xffffffff
.long 0xffffffff
.long 0x00000001
.long 0xffffffff
.long 0xffffffff
.long 0x7fffffff
.long 0x80000000
.long 0xffffffff
.long 0x80000000
.long 0x80000000
.long 0x7fffffff
.long 0xffffffff
.long 0x80000000
.long 0xffffffff
.long 0xffffffff
.long 0xffffffff
.long 0x00000001
.long 0x7fffffff
.long 0x7fffffff
.long 0xffffffff
.long 0x00000001
.long 0x80000000
.long 0x80000000
.long 0xffffffff
.long 0x00000000
_testvalue2:
_testfinish:
/**************
Congratulations
**************/
_pass:
lds.l @r15+, pr
mov.l _ppass_value, r0
mov.l _ppass_addr, r1
mov.l r0, @r1
rts
nop
.align 4
_ppass_addr: .long 0xABCD0000
_ppass_value: .long 0x00000044
/**********
You Failed
**********/
_fail:
mov.l _pfail_value, r0
mov.l _pfail_value, r1
bra _fail
nop
.align 4
_pfail_value: .long 0x88888888
.end

132
testrom/tests/testmuls.s Normal file
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@@ -0,0 +1,132 @@
/**************
Initialization
**************/
.global _testmuls
_testmuls:
sts.l pr, @-r15
mov.l _pfail, r13 !fail address
bra _testgo
nop
_pfail: .long _fail
_testgo:
/************************
MULS.L Rm, Rn
************************/
mov.l _ptestvalue1, r1
mov.l _ptestvalue2, r2
mov #0xff, r0
lds r0, mach
muls.w r2, r1
muls.w r1, r2
muls.w r2, r1
muls.w r1, r2 !You should check mult contention,here.
_testloop:
mov.l @r1+, r3
mov.l @r1+, r4
mov.l @r1+, r5
mov.l @r1+, r6
muls.w r4, r3
sts mach, r3 !You should check mult contention,here.
sts macl, r4
!----
cmp/eq r5, r3
bt .+6
jmp @r13
nop
!----
cmp/eq r6, r4
bt .+6
jmp @r13
nop
!----
cmp/eq r2, r1
bf _testloop
bra _testfinish
nop
!----
.align 4
_ptestvalue1: .long _testvalue1
_ptestvalue2: .long _testvalue2
.align 4
_testvalue1:
.long 0xffff0002 !Rn
.long 0xffff0003 !Rm
.long 0xffffffff !MACH
.long 0x00000006 !MACL
.long 0xffff1234
.long 0x00009abc
.long 0xffffffff
.long 0xf8cca630
.long 0xffff0001
.long 0x0000ffff
.long 0xffffffff
.long 0xffffffff
.long 0x0000ffff
.long 0xffff0001
.long 0xffffffff
.long 0xffffffff
.long 0xffff7fff
.long 0x00008000
.long 0xffffffff
.long 0xc0008000
.long 0x00008000
.long 0xffff7fff
.long 0xffffffff
.long 0xc0008000
.long 0x1234ffff
.long 0x5678ffff
.long 0xffffffff
.long 0x00000001
.long 0x9abc7fff
.long 0x9abc7fff
.long 0xffffffff
.long 0x3fff0001
.long 0x12348000
.long 0x12348000
.long 0xffffffff
.long 0x40000000
_testvalue2:
_testfinish:
/**************
Congratulations
**************/
_pass:
lds.l @r15+, pr
mov.l _ppass_value, r0
mov.l _ppass_addr, r1
mov.l r0, @r1
rts
nop
.align 4
_ppass_addr: .long 0xABCD0000
_ppass_value: .long 0x00000043
/**********
You Failed
**********/
_fail:
mov.l _pfail_value, r0
mov.l _pfail_value, r1
bra _fail
nop
.align 4
_pfail_value: .long 0x88888888
.end

132
testrom/tests/testmulu.s Normal file
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@@ -0,0 +1,132 @@
/**************
Initialization
**************/
.global _testmulu
_testmulu:
sts.l pr, @-r15
mov.l _pfail, r13 !fail address
bra _testgo
nop
_pfail: .long _fail
_testgo:
/************************
MULU.L Rm, Rn
************************/
mov.l _ptestvalue1, r1
mov.l _ptestvalue2, r2
mov #0xff, r0
lds r0, mach
mulu.w r2, r1
mulu.w r1, r2
mulu.w r2, r1
mulu.w r1, r2 !You should check mult contention,here.
_testloop:
mov.l @r1+, r3
mov.l @r1+, r4
mov.l @r1+, r5
mov.l @r1+, r6
mulu.w r4, r3
sts mach, r3 !You should check mult contention,here.
sts macl, r4
!----
cmp/eq r5, r3
bt .+6
jmp @r13
nop
!----
cmp/eq r6, r4
bt .+6
jmp @r13
nop
!----
cmp/eq r2, r1
bf _testloop
bra _testfinish
nop
!----
.align 4
_ptestvalue1: .long _testvalue1
_ptestvalue2: .long _testvalue2
.align 4
_testvalue1:
.long 0xffff0002 !Rn
.long 0xffff0003 !Rm
.long 0xffffffff !MACH
.long 0x00000006 !MACL
.long 0xffff1234
.long 0x00009abc
.long 0xffffffff
.long 0x0b00a630
.long 0xffff0001
.long 0x0000ffff
.long 0xffffffff
.long 0x0000ffff
.long 0x0000ffff
.long 0xffff0001
.long 0xffffffff
.long 0x0000ffff
.long 0xffff7fff
.long 0x00008000
.long 0xffffffff
.long 0x3fff8000
.long 0x00008000
.long 0xffff7fff
.long 0xffffffff
.long 0x3fff8000
.long 0x1234ffff
.long 0x5678ffff
.long 0xffffffff
.long 0xfffe0001
.long 0x9abc7fff
.long 0x9abc7fff
.long 0xffffffff
.long 0x3fff0001
.long 0x12348000
.long 0x12348000
.long 0xffffffff
.long 0x40000000
_testvalue2:
_testfinish:
/**************
Congratulations
**************/
_pass:
lds.l @r15+, pr
mov.l _ppass_value, r0
mov.l _ppass_addr, r1
mov.l r0, @r1
rts
nop
.align 4
_ppass_addr: .long 0xABCD0000
_ppass_value: .long 0x00000042
/**********
You Failed
**********/
_fail:
mov.l _pfail_value, r0
mov.l _pfail_value, r1
bra _fail
nop
.align 4
_pfail_value: .long 0x88888888
.end

430
testrom/tests/testshift.s Normal file
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@@ -0,0 +1,430 @@
/**************
Initialization
**************/
.global _testshift
_testshift:
sts.l pr, @-r15
mov.l _pfail, r13 !fail address
bra _testgo
nop
_pfail: .long _fail
_testgo:
/************************
SHLL Rn
************************/
mov.l _ptestvalue, r1
!----
mov.l @r1+, r2 ! initial SR
ldc r2, sr
mov.l @r1+, r3 ! initial value
shll r3
mov.l @r1+, r4 ! result SR
mov.l @r1+, r5 ! result value
stc sr, r6
cmp/eq r3, r5
bt .+6
jmp @r13
nop
cmp/eq r4, r6
bt .+6
jmp @r13
nop
!----
mov.l @r1+, r2 ! initial SR
ldc r2, sr
mov.l @r1+, r3 ! initial value
shal r3
mov.l @r1+, r4 ! result SR
mov.l @r1+, r5 ! result value
stc sr, r6
cmp/eq r3, r5
bt .+6
jmp @r13
nop
cmp/eq r4, r6
bt .+6
jmp @r13
nop
!----
mov.l @r1+, r2 ! initial SR
ldc r2, sr
mov.l @r1+, r3 ! initial value
shlr r3
mov.l @r1+, r4 ! result SR
mov.l @r1+, r5 ! result value
stc sr, r6
cmp/eq r3, r5
bt .+6
jmp @r13
nop
cmp/eq r4, r6
bt .+6
jmp @r13
nop
!----
mov.l @r1+, r2 ! initial SR
ldc r2, sr
mov.l @r1+, r3 ! initial value
shar r3
mov.l @r1+, r4 ! result SR
mov.l @r1+, r5 ! result value
stc sr, r6
cmp/eq r3, r5
bt .+6
jmp @r13
nop
cmp/eq r4, r6
bt .+6
jmp @r13
nop
!----
mov.l @r1+, r2 ! initial SR
ldc r2, sr
mov.l @r1+, r3 ! initial value
rotl r3
mov.l @r1+, r4 ! result SR
mov.l @r1+, r5 ! result value
stc sr, r6
cmp/eq r3, r5
bt .+6
jmp @r13
nop
cmp/eq r4, r6
bt .+6
jmp @r13
nop
!----
mov.l @r1+, r2 ! initial SR
ldc r2, sr
mov.l @r1+, r3 ! initial value
rotcl r3
mov.l @r1+, r4 ! result SR
mov.l @r1+, r5 ! result value
stc sr, r6
cmp/eq r3, r5
bt .+6
jmp @r13
nop
cmp/eq r4, r6
bt .+6
jmp @r13
nop
!----
mov.l @r1+, r2 ! initial SR
ldc r2, sr
mov.l @r1+, r3 ! initial value
rotr r3
mov.l @r1+, r4 ! result SR
mov.l @r1+, r5 ! result value
stc sr, r6
cmp/eq r3, r5
bt .+6
jmp @r13
nop
cmp/eq r4, r6
bt .+6
jmp @r13
nop
!----
mov.l @r1+, r2 ! initial SR
ldc r2, sr
mov.l @r1+, r3 ! initial value
rotcr r3
mov.l @r1+, r4 ! result SR
mov.l @r1+, r5 ! result value
stc sr, r6
cmp/eq r3, r5
bt .+6
jmp @r13
nop
cmp/eq r4, r6
bt .+6
jmp @r13
nop
!----
mov.l @r1+, r2 ! initial SR
ldc r2, sr
mov.l @r1+, r3 ! initial value
shll2 r3
mov.l @r1+, r4 ! result SR
mov.l @r1+, r5 ! result value
stc sr, r6
cmp/eq r3, r5
bt .+6
jmp @r13
nop
cmp/eq r4, r6
bt .+6
jmp @r13
nop
!----
mov.l @r1+, r2 ! initial SR
ldc r2, sr
mov.l @r1+, r3 ! initial value
shll8 r3
mov.l @r1+, r4 ! result SR
mov.l @r1+, r5 ! result value
stc sr, r6
cmp/eq r3, r5
bt .+6
jmp @r13
nop
cmp/eq r4, r6
bt .+6
jmp @r13
nop
!----
mov.l @r1+, r2 ! initial SR
ldc r2, sr
mov.l @r1+, r3 ! initial value
shll16 r3
mov.l @r1+, r4 ! result SR
mov.l @r1+, r5 ! result value
stc sr, r6
cmp/eq r3, r5
bt .+6
jmp @r13
nop
cmp/eq r4, r6
bt .+6
jmp @r13
nop
!----
mov.l @r1+, r2 ! initial SR
ldc r2, sr
mov.l @r1+, r3 ! initial value
shlr2 r3
mov.l @r1+, r4 ! result SR
mov.l @r1+, r5 ! result value
stc sr, r6
cmp/eq r3, r5
bt .+6
jmp @r13
nop
cmp/eq r4, r6
bt .+6
jmp @r13
nop
!----
mov.l @r1+, r2 ! initial SR
ldc r2, sr
mov.l @r1+, r3 ! initial value
shlr8 r3
mov.l @r1+, r4 ! result SR
mov.l @r1+, r5 ! result value
stc sr, r6
cmp/eq r3, r5
bt .+6
jmp @r13
nop
cmp/eq r4, r6
bt .+6
jmp @r13
nop
!----
mov.l @r1+, r2 ! initial SR
ldc r2, sr
mov.l @r1+, r3 ! initial value
shlr16 r3
mov.l @r1+, r4 ! result SR
mov.l @r1+, r5 ! result value
stc sr, r6
cmp/eq r3, r5
bt .+6
jmp @r13
nop
cmp/eq r4, r6
bt .+6
jmp @r13
nop
mov.l _ppass_value, r3
mov.l _ppass_addr, r4
mov.l r3, @r4
! Unlike other shifter instructions, SHAD and SHLD do not read or
! write the T bit. Instead of storing the initial and expected SR
! values in the test case, the following tests initialize SR to 0
! and compare against 0, using R0=0.
mov #0, r0
!---- SHLD
.rept 4
mov.l @r1+, r2 ! initial value A
mov.l @r1+, r3 ! initial value B
ldc r0, sr
shld r3, r2
stc sr, r0
mov.l @r1+, r5 ! result value
cmp/eq r2, r5
bt .+6
jmp @r13
nop
cmp/eq #0, r0
bt .+6
jmp @r13
nop
.endr
!----- SHAD
.rept 6
mov.l @r1+, r2 ! initial value A
mov.l @r1+, r3 ! initial value B
ldc r0, sr
shad r3, r2
stc sr, r0
mov.l @r1+, r5 ! result value
cmp/eq r2, r5
bt .+6
jmp @r13
nop
cmp/eq #0, r0
bt .+6
jmp @r13
nop
.endr
!----
bra _pass
nop
!----
.align 4
_ptestvalue: .long _testvalue
_testvalue :
!----SHLL
.long 0x00000000
.long 0xaaaaaaab ! 1010....1011
.long 0x00000001
.long 0x55555556 ! 0101....0110
!----SHAL
.long 0x00000001
.long 0x55555557 ! 0101....0111
.long 0x00000000
.long 0xaaaaaaae ! 1010....1110
!----SHLR
.long 0x00000001
.long 0xeaaaaaaa ! 1110....1010
.long 0x00000000
.long 0x75555555 ! 0111....0101
!----SHAR
.long 0x00000001
.long 0xaaaaaaaa ! 1010....1010
.long 0x00000000
.long 0xd5555555 ! 1101....0101
!----ROTL
.long 0x00000000
.long 0xaaaaaaab ! 1010....1011
.long 0x00000001
.long 0x55555557 ! 0101....0111
!----ROTCL
.long 0x00000000
.long 0xaaaaaaab ! 1010....1011
.long 0x00000001
.long 0x55555556 ! 0101....0110
!----ROTR
.long 0x00000000
.long 0xd5555555 ! 1101....0101
.long 0x00000001
.long 0xeaaaaaaa ! 1110....1010
!----ROTCR
.long 0x00000000
.long 0xd5555555 ! 1101....0101
.long 0x00000001
.long 0x6aaaaaaa ! 0110....1010
!----SHLL2
.long 0x00000001
.long 0x12345678
.long 0x00000001
.long 0x48d159e0
!----SHLL8
.long 0x00000001
.long 0x12345678
.long 0x00000001
.long 0x34567800
!----SHLL16
.long 0x00000001
.long 0x12345678
.long 0x00000001
.long 0x56780000
!----SHLR2
.long 0x00000000
.long 0x12345678
.long 0x00000000
.long 0x048d159e
!----SHLR8
.long 0x00000000
.long 0x12345678
.long 0x00000000
.long 0x00123456
!----SHLR16
.long 0x00000000
.long 0x12345678
.long 0x00000000
.long 0x00001234
!----SHLD
.long 0xa55a5aa5 ! A
.long 3 ! B
.long 0x2ad2d528 ! Y
.long 0xa55a5aa5
.long -21
.long 0x0000052a
.long 0xa55a5aa5
.long -32
.long 0
.long 0x255a5aa5
.long -32
.long 0
!----SHAD
.long 0x0aa5a55a ! A
.long 3 ! B
.long 0x552d2ad0 ! Y
.long 0x0aa5a55a
.long 4
.long 0xaa5a55a0
.long 0x5aa5a55a
.long -3
.long 0x0b54b4ab
.long 0xa55a5aa5
.long -10
.long 0xffe95696
.long 0xa55a5aa5
.long -32
.long -1
.long 0x255a5aa5
.long -32
.long 0
/**************
Congratulations
**************/
_pass:
lds.l @r15+, pr
mov.l _ppass2_value, r0
mov.l _ppass_addr, r1
mov.l r0, @r1
rts
nop
.align 4
_ppass_addr: .long 0xABCD0000
_ppass_value: .long 0x00000032
_ppass2_value: .long 0x00000033
/**********
You Failed
**********/
_fail:
mov.l _pfail_value, r0
mov.l _pfail_value, r1
bra _fail
nop
.align 4
_pfail_value: .long 0x88888888
.end

92
testrom/uart16550.c Normal file
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@@ -0,0 +1,92 @@
/* Simple 16550 compatible UART routines for GDB stub */
struct st_uart16550
{
unsigned int RTX;
unsigned int IER;
unsigned int IIR;
unsigned int LCR;
unsigned int MCR;
unsigned int LSR;
unsigned int MSR;
unsigned int SCR;
};
#define UART 0xabcd0100
#define UART16550 (*(volatile struct st_uart16550 *)UART)
//****************************************************
//* *
//* UART Utilities *
//* *
//****************************************************
//==============================
// Send Tx
// -----------------------------
// Input : data = send data
// Output : none
void
uart_tx (unsigned char data)
{
while (!((UART16550.LSR) & 0x20));
UART16550.RTX = data;
}
//====================================
// Receive RX
// -----------------------------------
// Input : none
// Output : uart_rx = receive data
//====================================
unsigned char
uart_rx (void)
{
while (!((UART16550.LSR) & 0x1));
return (UART16550.RTX & 0xff);
}
//=========================================
// Receive RX with echo to TX
// ----------------------------------------
// Input : none
// Output : uart_rx_echo = receive data
//=========================================
unsigned char
uart_rx_echo (void)
{
unsigned char data;
while (!(UART16550.LSR & 1));
data = UART16550.RTX & 0xff;
while (!(UART16550.LSR & 0x20));
UART16550.RTX = data;
return data;
}
//==================
// Flush RXD FIFO
//------------------
// Input : none
// Output : none
//==================
void
uart_rx_flush (void)
{
while (UART16550.LSR & 1) UART16550.RTX;
}
//==============================
// Set Baud Rate 115200bps
//------------------------------
// Input : none
// Output : none
//==============================
void
uart_set_baudrate (void)
{
UART16550.LCR = 0x83;
UART16550.RTX = 0x0a;
UART16550.IER = 0;
UART16550.LCR = 0x3;
}

82
testrom/uartlite.c Normal file
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@@ -0,0 +1,82 @@
/* Simple Xilinx uartlite compatible UART routines for GDB stub */
struct st_uartlite
{
unsigned int rxfifo;
unsigned int txfifo;
unsigned int status;
unsigned int control;
};
#define UART 0xabcd0100
#define UARTLITE (*(volatile struct st_uartlite *)UART)
//****************************************************
//* *
//* UART Utilities *
//* *
//****************************************************
//==============================
// Send Tx
// -----------------------------
// Input : data = send data
// Output : none
void
uart_tx (unsigned char data)
{
while (UARTLITE.status & 0x08);
UARTLITE.txfifo = data;
}
//====================================
// Receive RX
// -----------------------------------
// Input : none
// Output : uart_rx = receive data
//====================================
unsigned char
uart_rx (void)
{
while (!(UARTLITE.status & 0x01));
return (UARTLITE.rxfifo & 0xff);
}
//=========================================
// Receive RX with echo to TX
// ----------------------------------------
// Input : none
// Output : uart_rx_echo = receive data
//=========================================
unsigned char
uart_rx_echo (void)
{
unsigned char data;
uart_tx(data = uart_rx());
return data;
}
//==================
// Flush RXD FIFO
//------------------
// Input : none
// Output : none
//==================
void
uart_rx_flush (void)
{
UARTLITE.control = 0x02;
}
//==============================
// Set Baud Rate 115200bps
//------------------------------
// Input : none
// Output : none
//==============================
void
uart_set_baudrate (void)
{
/* baud is fixed in a VHDL generic */
}