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mirror of https://github.com/j-core/j-core-ice40.git synced 2026-05-03 14:38:29 +00:00

Add in the test rom

This commit is contained in:
J
2019-03-03 19:35:20 -05:00
parent ea1dd551f9
commit 9e5f83edd9
28 changed files with 8601 additions and 0 deletions

57
testrom/startup/sh.x Normal file
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/**************************************
SuperH (SH-2) C Compiler Linker Script
**************************************/
OUTPUT_FORMAT("elf32-sh")
OUTPUT_ARCH(sh)
MEMORY
{
ram : o = 0x00000000, l = 0x3b00
stack : o = 0x00003d00, l = 0x0300
}
SECTIONS
{
.text : {
*(.vect)
*(.text)
*(.strings)
_etext = . ;
} > ram
.tors : {
___ctors = . ;
*(.ctors)
___ctors_end = . ;
___dtors = . ;
*(.dtors)
___dtors_end = . ;
} > ram
.rodata : {
*(.rodata*)
} >ram
__idata_start = ADDR(.text) + SIZEOF(.text) + SIZEOF(.tors) + SIZEOF(.rodata);
.data : AT(__idata_start) {
__idata_start = .;
_sdata = . ;
*(.data)
_edata = . ;
} > ram
__idata_end = __idata_start + SIZEOF(.data);
.bss : {
_bss_start = .;
*(.bss)
*(COMMON)
_end = .;
} >ram
.stack :
{
_stack = .;
*(.stack)
} > stack
}

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testrom/startup/sh32.x Normal file
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/**************************************
SuperH (SH-2) C Compiler Linker Script
**************************************/
OUTPUT_FORMAT("elf32-sh")
OUTPUT_ARCH(sh)
MEMORY
{
ram : o = 0x00000000, l = 0x1c00
stack : o = 0x00001ffc, l = 0x03fc
}
SECTIONS
{
.text : {
*(.vect)
*(.text)
*(.strings)
_etext = . ;
} > ram
.tors : {
___ctors = . ;
*(.ctors)
___ctors_end = . ;
___dtors = . ;
*(.dtors)
___dtors_end = . ;
} > ram
.rodata : {
*(.rodata*)
} >ram
__idata_start = ADDR(.text) + SIZEOF(.text) + SIZEOF(.tors) + SIZEOF(.rodata);
.data : AT(__idata_start) {
__idata_start = .;
_sdata = . ;
*(.data)
_edata = . ;
} > ram
__idata_end = __idata_start + SIZEOF(.data);
.bss : {
_bss_start = .;
*(.bss)
*(COMMON)
_end = .;
} >ram
.stack :
{
_stack = .;
*(.stack)
} > stack
}