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mirror of https://github.com/j-core/j-core-ice40.git synced 2026-01-11 23:52:49 +00:00

Add testrom, modified for small memory... enable tests if you need in Makefile

This commit is contained in:
J 2019-03-03 20:55:24 -05:00
parent 9e5f83edd9
commit a0acbcafdc
4 changed files with 11 additions and 3 deletions

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@ -27,15 +27,15 @@ begin
iclk <= not clk;
r : entity work.asymmetric_ram
generic map (ADDR_WIDTH => 14)
generic map (ADDR_WIDTH => 12)
port map(clkA => iclk,
clkB => iclk,
enA => ibus_i.en,
addrA => ibus_i.a(14 downto 1),
addrA => ibus_i.a(12 downto 1),
doA => ibus_o.d,
enB => db_i.en,
weB => db_we,
addrB => db_i.a(14 downto 2),
addrB => db_i.a(12 downto 2),
diB => db_i.d,
doB => db_o.d);

BIN
ram.img Normal file → Executable file

Binary file not shown.

6
ram.sh Normal file
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@ -0,0 +1,6 @@
#!/bin/sh
rm ram.img
make -C testrom
sh2-elf-size testrom/main.elf ram.img
sh2-elf-objcopy -v -S -O binary --srec-forceS3 testrom/main.elf ram.img

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@ -87,8 +87,10 @@ main_sh (void)
uart_set_baudrate ();
led(0x042);
#ifndef NO_TESTS
putstr ("CPU tests passed\n");
led(0x043);
#endif
#ifndef NO_DDR
putstr ("DDR Init\n");