github.com/lisper.cpus-pdp8
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brad 2010-04-24 10:37:33 +00:00
parent 9bbe1a147e
commit 1ef9bc7815
2 changed files with 8 additions and 20 deletions
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6
rtl/pdp8.v
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@ -596,7 +596,9 @@ module pdp8(clk, reset, initial_pc, pc_out, ac_out,
begin
interrupt_cycle <= 0;
if (0) $display("read ram [%o] -> %o", ram_addr, ram_data_in);
if (0)
$display("read ram [%o] -> %o", ram_addr, ram_data_in);
mb <= ram_data_in;
ir <= ram_data_in[11:9];
ir_i_flag <= ram_data_in[8];
@ -721,7 +723,7 @@ module pdp8(clk, reset, initial_pc, pc_out, ac_out,
if (io_data_avail)
begin
//$display("io_data clock %o", io_data_in);
if (0) $display("io_data clock %o", io_data_in);
ac <= io_data_in;
end

22
rtl/pdp8_tt.v
View File

@ -1,4 +1,4 @@
// PDP8 console emulation
// PDP-8 console emulation
// brad@heeltoe.com
`ifdef debug
@ -182,7 +182,7 @@ module pdp8_tt(clk, brgclk, reset,
end
else
begin
//
if (assert_tx_int)
begin
`ifdef debug_tt_int
@ -190,12 +190,13 @@ module pdp8_tt(clk, brgclk, reset,
`endif
tx_int <= 1;
end
if (assert_rx_int)
begin
//$display("xxx set rx_int");
rx_int <= 1;
end
//
if (iot && state == F1)
begin
`ifdef debug_tt_reg
@ -232,21 +233,6 @@ module pdp8_tt(clk, brgclk, reset,
end // case: 6'o04
endcase
end // if (iot && state == F1)
// else
// begin
// if (assert_tx_int)
// begin
//`ifdef debug_tt_int
// $display("xxx set tx_int");
//`endif
// tx_int <= 1;
// end
// if (assert_rx_int)
// begin
// //$display("xxx set rx_int");
// rx_int <= 1;
// end
// end
end // else: !if(reset)