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db0167afe1
PRU1 code split into multiple images 1. test functions 2. UNIBUS operation PRU1 bus latch interface Write byte/bits access not with MACROS (random optimizer influence), now with *_helper() procedures. Same timing, more determinism, much code saving. Nono more ASM code to write PRU0 XFER area. demo: menu to test UNIBUS signals directly rework "Arbitration" logic: now 3-fold Rework of UNIBUs arbtiration: NONE/CLIENT/MASTER - no Arbitrator (SACK penidng for 11/34 Konsole) (NONE) - phyiscal PDP_11 CPU is Arbitrator (CLIENT) - UniBone implements Arbitrator (MASTER) - Same PRU code loop handles all arbitration types PRU buslatch timing slower, for some problematic PCBs More aggressive bus latch selftest (mixed patterns, running on PRU now) Refinement of ready-to-run scripts - Adapted to changed "demo" menu - new name scheme <OS>_<boot- drive>_<PDP-11CPU> indicates - which OS is run - which disk emulation is used and what is the boot device - what is the (minimum) PDP-11 to run that Merged in Joshs DMA timing for 11/84 UNIBUS master cycles waits 350 us before MSYN, instead 150. Merged in Joshs DMA request queue multiple devices canrequest INTR and DMAs concurrently, will be put on the bus sequentially Merged in Joshs MSCP driver - Build RT-11v5.5 for MSCP - added boot loader "du.lst" MSCP run scrips 2.11BSD on MSCP on PDP-11/44 RT11 on MSCP Fix: image file sizing Disk image file exptend automatically if block beyond current file end is written
124 lines
3.7 KiB
C++
124 lines
3.7 KiB
C++
/* mailbox.cpp: datastructs common to ARM and PRU
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Copyright (c) 2018, Joerg Hoppe
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j_hoppe@t-online.de, www.retrocmp.com
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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JOERG HOPPE BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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12-nov-2018 JH entered beta phase
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*/
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#define _MAILBOX_CPP_
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#include <stdio.h>
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#include <string.h>
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#include "prussdrv.h"
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#include "pru.hpp"
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#include "logger.hpp"
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#include "ddrmem.h"
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#include "mailbox.h"
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// is located in PRU 12kb shared memory.
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// address symbol "" fetched from linker map
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volatile mailbox_t *mailbox;
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// Init all fields, most to 0's
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int mailbox_connect(void) {
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void *pru_shared_dataram;
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// get pointer to RAM
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if (prussdrv_map_prumem(PRU_MAILBOX_RAM_ID, &pru_shared_dataram)) {
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printf("ERROR: prussdrv_map_prumem() failed\n");
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return -1;
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}
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// prussdrv_map_prumem( PRU_MAILBOX_RAM_ID, &pru_shared_dataram) ;
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// point to struct inside RAM
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mailbox = (mailbox_t *) ((char *) pru_shared_dataram + PRU_MAILBOX_RAM_OFFSET);
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// now ARM and PRU can access the mailbox
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memset((void*)mailbox, 0, sizeof(mailbox_t)) ;
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// tell PRU location of shared DDR RAM
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mailbox->ddrmem_base_physical = (ddrmem_t *) ddrmem->base_physical;
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return 0;
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}
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void mailbox_print(void) {
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printf("INFO: Content of mailbox to PRU:\n"
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"arm2pru: req=0x%x, resp=0x%x\n", mailbox->arm2pru_req, mailbox->arm2pru_resp);
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}
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/* simulate simple register accesses:
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* write test_addr + OP,
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* result in "val"
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*/
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static unsigned n = 0;
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void mailbox_test1() {
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unsigned reg_sel = 0;
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for (reg_sel = 0; reg_sel < 8; reg_sel++) {
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//TODO: memory barrier??
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// __sync_synchronize() ;
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mailbox->mailbox_test.addr = n & 0xff;
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// __sync_synchronize() ;
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while (mailbox->mailbox_test.addr != (n & 0xff))
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; // cache ?
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__sync_synchronize(); // write to arm2pru_req must be last operation
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mailbox->arm2pru_req = ARM2PRU_MAILBOXTEST1; // go!
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while (mailbox->arm2pru_req)
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; // wait until processed
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// __sync_synchronize() ;
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n++;
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// PRU copies addr to val and may output on GPIOs
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/*
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if (mailbox->mailbox_test.val != mailbox->mailbox_test.addr) {
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printf("?");
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fflush(stdout);
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}
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*/
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}
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}
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/* start cmd to PRU via mailbox. Wait until ready
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* mailbox union members must have been filled
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*/
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uint32_t xxx ;
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void mailbox_execute(uint8_t request, uint8_t stopcode) {
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// write to arm2pru_req must be last memory operation
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__sync_synchronize();
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mailbox->arm2pru_req = request; // go!
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do {
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xxx = mailbox-> arm2pru_req ;
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if (mailbox->events.eventmask) {
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// event not processed? will hang DMA.
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// printf("WARNING: Unprocessed mailbox.events.eventmask = 0x%x\n", (unsigned) mailbox->events.eventmask) ;
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// mailbox->events.eventmask = 0 ;
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}
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} while (xxx != stopcode) ;
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while (mailbox->arm2pru_req != stopcode)
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; // wait until processed
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}
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