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livingcomputermuseum.UniBone/10.02_devices
Josh Dersch 6f1b476716 Cleaned up signaling of DMA/INTR completion (using pthread_cond_wait).
Tweaked MSYN timeout value from 350ns to 400ns to compensate for timing changes
with latest PRU code -- MSCP works reliably on PDP-11/84 again.
2019-08-16 02:23:32 +02:00
..
2019-08-02 16:45:54 +02:00
2019-06-14 16:31:01 +02:00