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sim: sim_halfword: handle HRLE/HRLEI/HRLEM/HRLES, add unit tests

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This commit is contained in:
Mikael Pettersson
2020-07-27 18:28:26 +02:00
parent b5ef0e112e
commit 187178e48a
3 changed files with 113 additions and 0 deletions
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4
erlang/apps/sim/src/sim_core.erl
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@@ -345,6 +345,10 @@ dispatch(Core, Mem, IR, EA) ->
8#531 -> sim_boolean:handle_SETZ(Core, Mem, IR, EA); % HLLEI = HLLZI = SETZ
8#532 -> sim_halfword:handle_HLLEM(Core, Mem, IR, EA);
8#533 -> sim_halfword:handle_HLLES(Core, Mem, IR, EA);
8#534 -> sim_halfword:handle_HRLE(Core, Mem, IR, EA);
8#535 -> sim_halfword:handle_HRLEI(Core, Mem, IR, EA);
8#536 -> sim_halfword:handle_HRLEM(Core, Mem, IR, EA);
8#537 -> sim_halfword:handle_HRLES(Core, Mem, IR, EA);
_ ->
PC = (Core#core.pc_section bsl 18) bor Core#core.pc_offset,
{Core, Mem, {error, {?MODULE, {dispatch, PC, IR, EA}}}}

47
erlang/apps/sim/src/sim_halfword.erl
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@@ -39,6 +39,10 @@
, handle_HLLZM/4
, handle_HLLZS/4
, handle_HRL/4
, handle_HRLE/4
, handle_HRLEI/4
, handle_HRLEM/4
, handle_HRLES/4
, handle_HRLI/4
, handle_HRLM/4
, handle_HRLO/4
@@ -361,6 +365,49 @@ handle_HRLOS(Core, Mem, IR, EA) ->
fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
end.
%% HRLE - Half Word Right to Left, Extend
-spec handle_HRLE(#core{}, sim_mem:mem(), IR :: word(), #ea{})
-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
handle_HRLE(Core, Mem, IR, EA) ->
case sim_core:c(Core, Mem, EA) of
{ok, CE} ->
AC = IR band 8#17,
Word = set_left_extend(get_right(CE)),
sim_core:next_pc(sim_core:set_ac(Core, AC, Word), Mem);
{error, Reason} ->
sim_core:page_fault(Core, Mem, ea_address(EA), read, Reason,
fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
end.
-spec handle_HRLEI(#core{}, sim_mem:mem(), IR :: word(), #ea{})
-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
handle_HRLEI(Core, Mem, IR, EA) ->
AC = IR band 8#17,
Word = set_left_extend(EA#ea.offset),
sim_core:next_pc(sim_core:set_ac(Core, AC, Word), Mem).
-spec handle_HRLEM(#core{}, sim_mem:mem(), IR :: word(), #ea{})
-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
handle_HRLEM(Core, Mem, IR, EA) ->
AC = IR band 8#17,
CA = sim_core:get_ac(Core, AC),
Word = set_left_extend(get_right(CA)),
handle_writeback(Core, Mem, EA, Word).
-spec handle_HRLES(#core{}, sim_mem:mem(), IR :: word(), #ea{})
-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
handle_HRLES(Core, Mem, IR, EA) ->
case sim_core:c(Core, Mem, EA) of
{ok, CE} ->
AC = IR band 8#17,
Word = set_left_extend(get_right(CE)),
handle_writeback(Core, Mem, AC, EA, Word);
{error, Reason} ->
sim_core:page_fault(Core, Mem, ea_address(EA), read, Reason,
fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
end.
%% Miscellaneous ===============================================================
handle_writeback(Core, Mem, EA, Word) ->

62
erlang/apps/sim/test/sim_halfword_tests.erl
View File

@@ -73,6 +73,10 @@
-define(OP_HLLEI, 8#531).
-define(OP_HLLEM, 8#532).
-define(OP_HLLES, 8#533).
-define(OP_HRLE, 8#534).
-define(OP_HRLEI, 8#535).
-define(OP_HRLEM, 8#536).
-define(OP_HRLES, 8#537).
%% 2.8 Half-Word Data Transmission =============================================
@@ -505,6 +509,64 @@ hrlos_no_ac_test() ->
, {#ea{section = 1, offset = 0, islocal = false}, ?COMMA2(0, 1)} % AC0 = 0,,1
]).
%% HRLE - Half Word Right to Left, Extend
hrle_test() ->
Prog =
[ {1, 8#100, ?INSN(?OP_MOVEI, 1, 0, 0, 1)} % 1,,100/ MOVEI 1,1
, {1, 8#101, ?INSN(?OP_HRLE, 1, 0, 0, 8#200)} % 1,,101/ HRLE 1,200
, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
, {1, 8#200, ?COMMA2(0, -1)} % 1,,200/ 0,,-1
],
expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
[ {#ea{section = 1, offset = 1, islocal = false}, ?COMMA2(-1, -1)} % AC1 = -1,,-1
]).
hrlei_test() ->
Prog =
[ {1, 8#100, ?INSN(?OP_MOVEI, 1, 0, 0, 1)} % 1,,100/ MOVEI 1,1
, {1, 8#101, ?INSN(?OP_HRLEI, 1, 0, 0, 1)} % 1,,101/ HRLEI 1,1
, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
],
expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
[ {#ea{section = 1, offset = 1, islocal = false}, ?COMMA2(1, 0)} % AC1 = 1,,0
]).
hrlem_test() ->
Prog =
[ {1, 8#100, ?INSN(?OP_MOVEI, 1, 0, 0, 1)} % 1,,100/ MOVEI 1,1
, {1, 8#101, ?INSN(?OP_HRLEM, 1, 0, 0, 8#200)} % 1,,101/ HRLEM 1,200
, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
, {1, 8#200, ?COMMA2(0, 1)} % 1,,200/ 0,,1
],
expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
[ {#ea{section = 1, offset = 8#200, islocal = false}, ?COMMA2(1, 0)} % C(1,,200) = 1,,0
]).
hrles_ac_test() ->
Prog =
[ {1, 8#100, ?INSN(?OP_MOVEI, 1, 0, 0, 1)} % 1,,100/ MOVEI 1,1
, {1, 8#101, ?INSN(?OP_HRLES, 1, 0, 0, 8#200)} % 1,,101/ HRLES 1,200
, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
, {1, 8#200, ?COMMA2(0, -1)} % 1,,200/ 0,,-1
],
expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
[ {#ea{section = 1, offset = 8#200, islocal = false}, ?COMMA2(-1, -1)} % C(1,,200) = -1,,-1
, {#ea{section = 1, offset = 1, islocal = false}, ?COMMA2(-1, -1)} % AC1 = -1,,-1
]).
hrles_no_ac_test() ->
Prog =
[ {1, 8#100, ?INSN(?OP_MOVEI, 0, 0, 0, 1)} % 1,,100/ MOVEI 0,1
, {1, 8#101, ?INSN(?OP_HRLES, 0, 0, 0, 8#200)} % 1,,101/ HRLES 0,200
, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
, {1, 8#200, ?COMMA2(0, 1)} % 1,,200/ 0,,1
],
expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
[ {#ea{section = 1, offset = 8#200, islocal = false}, ?COMMA2(1, 0)} % C(1,,200) = 1,,0
, {#ea{section = 1, offset = 0, islocal = false}, ?COMMA2(0, 1)} % AC0 = 0,,1
]).
%% Common code to run short sequences ==========================================
expect(Prog, ACs, ExpectedPC, ExpectedFlags, ExpectedEs) ->