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sim: sim_halfword: handle HRLO/HRLOI/HRLOM/HRLOS, add unit tests

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This commit is contained in:
Mikael Pettersson 2020-07-27 16:05:49 +02:00
parent fd9a8e96c2
commit b5ef0e112e
3 changed files with 113 additions and 0 deletions
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4
erlang/apps/sim/src/sim_core.erl
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@ -337,6 +337,10 @@ dispatch(Core, Mem, IR, EA) ->
8#521 -> sim_halfword:handle_HLLOI(Core, Mem, IR, EA);
8#522 -> sim_halfword:handle_HLLOM(Core, Mem, IR, EA);
8#523 -> sim_halfword:handle_HLLOS(Core, Mem, IR, EA);
8#524 -> sim_halfword:handle_HRLO(Core, Mem, IR, EA);
8#525 -> sim_halfword:handle_HRLOI(Core, Mem, IR, EA);
8#526 -> sim_halfword:handle_HRLOM(Core, Mem, IR, EA);
8#527 -> sim_halfword:handle_HRLOS(Core, Mem, IR, EA);
8#530 -> sim_halfword:handle_HLLE(Core, Mem, IR, EA);
8#531 -> sim_boolean:handle_SETZ(Core, Mem, IR, EA); % HLLEI = HLLZI = SETZ
8#532 -> sim_halfword:handle_HLLEM(Core, Mem, IR, EA);

47
erlang/apps/sim/src/sim_halfword.erl
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@ -41,6 +41,10 @@
, handle_HRL/4
, handle_HRLI/4
, handle_HRLM/4
, handle_HRLO/4
, handle_HRLOI/4
, handle_HRLOM/4
, handle_HRLOS/4
, handle_HRLS/4
, handle_HRLZ/4
, handle_HRLZM/4
@ -314,6 +318,49 @@ handle_HRLZS(Core, Mem, IR, EA) ->
fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
end.
%% HRLO - Half Word Right to Left, Ones
-spec handle_HRLO(#core{}, sim_mem:mem(), IR :: word(), #ea{})
-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
handle_HRLO(Core, Mem, IR, EA) ->
case sim_core:c(Core, Mem, EA) of
{ok, CE} ->
AC = IR band 8#17,
Word = set_left_ones(get_right(CE)),
sim_core:next_pc(sim_core:set_ac(Core, AC, Word), Mem);
{error, Reason} ->
sim_core:page_fault(Core, Mem, ea_address(EA), read, Reason,
fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
end.
-spec handle_HRLOI(#core{}, sim_mem:mem(), IR :: word(), #ea{})
-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
handle_HRLOI(Core, Mem, IR, EA) ->
AC = IR band 8#17,
Word = set_left_ones(EA#ea.offset),
sim_core:next_pc(sim_core:set_ac(Core, AC, Word), Mem).
-spec handle_HRLOM(#core{}, sim_mem:mem(), IR :: word(), #ea{})
-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
handle_HRLOM(Core, Mem, IR, EA) ->
AC = IR band 8#17,
CA = sim_core:get_ac(Core, AC),
Word = set_left_ones(get_right(CA)),
handle_writeback(Core, Mem, EA, Word).
-spec handle_HRLOS(#core{}, sim_mem:mem(), IR :: word(), #ea{})
-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
handle_HRLOS(Core, Mem, IR, EA) ->
case sim_core:c(Core, Mem, EA) of
{ok, CE} ->
AC = IR band 8#17,
Word = set_left_ones(get_right(CE)),
handle_writeback(Core, Mem, AC, EA, Word);
{error, Reason} ->
sim_core:page_fault(Core, Mem, ea_address(EA), read, Reason,
fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
end.
%% Miscellaneous ===============================================================
handle_writeback(Core, Mem, EA, Word) ->

62
erlang/apps/sim/test/sim_halfword_tests.erl
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@ -65,6 +65,10 @@
-define(OP_HLLOI, 8#521).
-define(OP_HLLOM, 8#522).
-define(OP_HLLOS, 8#523).
-define(OP_HRLO, 8#524).
-define(OP_HRLOI, 8#525).
-define(OP_HRLOM, 8#526).
-define(OP_HRLOS, 8#527).
-define(OP_HLLE, 8#530).
-define(OP_HLLEI, 8#531).
-define(OP_HLLEM, 8#532).
@ -443,6 +447,64 @@ hrlzs_no_ac_test() ->
, {#ea{section = 1, offset = 0, islocal = false}, ?COMMA2(0, 1)} % AC0 = 0,,1
]).
%% HRLO - Half Word Right to Left, Ones
hrlo_test() ->
Prog =
[ {1, 8#100, ?INSN(?OP_MOVEI, 1, 0, 0, 1)} % 1,,100/ MOVEI 1,1
, {1, 8#101, ?INSN(?OP_HRLO, 1, 0, 0, 8#200)} % 1,,101/ HRLO 1,200
, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
, {1, 8#200, ?COMMA2(0, 1)} % 1,,200/ 0,,1
],
expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
[ {#ea{section = 1, offset = 1, islocal = false}, ?COMMA2(1, -1)} % AC1 = 1,,-1
]).
hrloi_test() ->
Prog =
[ {1, 8#100, ?INSN(?OP_MOVEI, 1, 0, 0, 1)} % 1,,100/ MOVEI 1,1
, {1, 8#101, ?INSN(?OP_HRLOI, 1, 0, 0, 1)} % 1,,101/ HRLOI 1,1
, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
],
expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
[ {#ea{section = 1, offset = 1, islocal = false}, ?COMMA2(1, -1)} % AC1 = 1,,-1
]).
hrlom_test() ->
Prog =
[ {1, 8#100, ?INSN(?OP_MOVEI, 1, 0, 0, 1)} % 1,,100/ MOVEI 1,1
, {1, 8#101, ?INSN(?OP_HRLOM, 1, 0, 0, 8#200)} % 1,,101/ HRLOM 1,200
, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
, {1, 8#200, ?COMMA2(0, 1)} % 1,,200/ 0,,1
],
expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
[ {#ea{section = 1, offset = 8#200, islocal = false}, ?COMMA2(1, -1)} % C(1,,200) = 1,,-1
]).
hrlos_ac_test() ->
Prog =
[ {1, 8#100, ?INSN(?OP_MOVEI, 1, 0, 0, 1)} % 1,,100/ MOVEI 1,1
, {1, 8#101, ?INSN(?OP_HRLOS, 1, 0, 0, 8#200)} % 1,,101/ HRLOS 1,200
, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
, {1, 8#200, ?COMMA2(0, 1)} % 1,,200/ 0,,1
],
expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
[ {#ea{section = 1, offset = 8#200, islocal = false}, ?COMMA2(1, -1)} % C(1,,200) = 1,,-1
, {#ea{section = 1, offset = 1, islocal = false}, ?COMMA2(1, -1)} % AC1 = 1,,-1
]).
hrlos_no_ac_test() ->
Prog =
[ {1, 8#100, ?INSN(?OP_MOVEI, 0, 0, 0, 1)} % 1,,100/ MOVEI 0,1
, {1, 8#101, ?INSN(?OP_HRLOS, 0, 0, 0, 8#200)} % 1,,101/ HRLOS 0,200
, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
, {1, 8#200, ?COMMA2(0, 1)} % 1,,200/ 0,,1
],
expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
[ {#ea{section = 1, offset = 8#200, islocal = false}, ?COMMA2(1, -1)} % C(1,,200) = 1,,-1
, {#ea{section = 1, offset = 0, islocal = false}, ?COMMA2(0, 1)} % AC0 = 0,,1
]).
%% Common code to run short sequences ==========================================
expect(Prog, ACs, ExpectedPC, ExpectedFlags, ExpectedEs) ->