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ikbd fixes

This commit is contained in:
harbaum
2013-04-03 18:05:23 +00:00
parent 94af81f4f7
commit 0618216c6b
3 changed files with 9 additions and 5 deletions

View File

@@ -55,11 +55,14 @@ always @(negedge clk) begin
// reset read and write counters
readPin <= 4'd0;
writePin <= 4'd0;
end else if(ikbd_strobe_inD && !ikbd_strobe_inD2) begin
end else begin
if(ikbd_strobe_inD && !ikbd_strobe_inD2) begin
// store data in fifo
fifoIn[writePin] <= ikbd_data_in;
writePin <= writePin + 4'd1;
end else if(data_read && dataInAvail) begin
end
if(data_read && dataInAvail) begin
readPin <= readPin + 4'd1;
// Some programs (e.g. bolo) need a pause between two ikbd bytes.
@@ -67,7 +70,8 @@ always @(negedge clk) begin
// One byte is 1/718.25 seconds. A pause of ~1ms is thus required
// 8000000/718.25 = 11138.18
readTimer <= 14'd11138;
end
end
end
end
// ------------------ cpu interface --------------------

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@@ -4,7 +4,7 @@
module mist_top (
// clock inputs
// clock inputsxque
input wire [ 2-1:0] CLOCK_27, // 27 MHz
// LED outputs
output wire LED, // LED Yellow

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@@ -301,7 +301,7 @@ wire [9:0] v_offset = mono?10'd0:10'd2;
wire de = (hcnt >= H_PRE) && (hcnt < H_ACT+H_PRE) && (vcnt >= v_offset && vcnt < V_ACT+v_offset);
// a fake de signal for timer a for color modes with half the hsync frequency
wire deC = (((hcnt >= H_PRE) && !vcnt[0]) || ((hcnt < H_ACT+H_PRE-10'd96) && vcnt[0])) &&
wire deC = (((hcnt >= H_PRE) && !vcnt[0]) || ((hcnt < H_ACT+H_PRE-10'd128) && vcnt[0])) &&
(vcnt >= (v_offset-10'd0) && vcnt < (V_ACT+v_offset-10'd0));
// a fake hsync pulse for the scan doubled color modes