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ikbd fixes
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@@ -55,11 +55,14 @@ always @(negedge clk) begin
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// reset read and write counters
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readPin <= 4'd0;
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writePin <= 4'd0;
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end else if(ikbd_strobe_inD && !ikbd_strobe_inD2) begin
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end else begin
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if(ikbd_strobe_inD && !ikbd_strobe_inD2) begin
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// store data in fifo
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fifoIn[writePin] <= ikbd_data_in;
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writePin <= writePin + 4'd1;
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end else if(data_read && dataInAvail) begin
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end
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if(data_read && dataInAvail) begin
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readPin <= readPin + 4'd1;
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// Some programs (e.g. bolo) need a pause between two ikbd bytes.
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@@ -67,7 +70,8 @@ always @(negedge clk) begin
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// One byte is 1/718.25 seconds. A pause of ~1ms is thus required
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// 8000000/718.25 = 11138.18
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readTimer <= 14'd11138;
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end
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end
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end
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end
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// ------------------ cpu interface --------------------
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@@ -4,7 +4,7 @@
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module mist_top (
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// clock inputs
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// clock inputsxque
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input wire [ 2-1:0] CLOCK_27, // 27 MHz
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// LED outputs
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output wire LED, // LED Yellow
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@@ -301,7 +301,7 @@ wire [9:0] v_offset = mono?10'd0:10'd2;
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wire de = (hcnt >= H_PRE) && (hcnt < H_ACT+H_PRE) && (vcnt >= v_offset && vcnt < V_ACT+v_offset);
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// a fake de signal for timer a for color modes with half the hsync frequency
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wire deC = (((hcnt >= H_PRE) && !vcnt[0]) || ((hcnt < H_ACT+H_PRE-10'd96) && vcnt[0])) &&
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wire deC = (((hcnt >= H_PRE) && !vcnt[0]) || ((hcnt < H_ACT+H_PRE-10'd128) && vcnt[0])) &&
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(vcnt >= (v_offset-10'd0) && vcnt < (V_ACT+v_offset-10'd0));
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// a fake hsync pulse for the scan doubled color modes
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